Composite transistor circuit

Claim 2

A composite transistor circuit which comprises: an input transistor of a first polarity whose emitter is connected to a first power source; a first current mirror circuit formed of transistors of a second polarity; the first current mirror circuit comprising a first reference current circuit and a first output current circuit and producing an output current bearing a first predetermined ratio to first reference current; and wherein one end of said first reference current circuit is connected to the collector of said input transistor; and the other end of said first reference current circuit and one end of said first output current circuit are connected to a second power source; and a second current mirror circuit formed of transistors of the first polarity; the second current mirror circuit comprising a second reference current circuit and a second output current circuit and producing an output current bearing a second predetermined ratio to a second reference current; and wherein one end of said second reference current circuit is connected to the other terminal of said first output current circuit; the other end of said second reference current circuit and one end of said second output current circuit are connected to the emitter of said input transistor; and the other end of the second output current circuit is connected to an output terminal of the composite transistor circuit; whereby said input transistor, first current mirror circuit and a second current mirror circuit equivalently constitute a composite transistor whose base, emitter and collector are respectively constituted, as equivalently viewed, by the base and emitter of the first transistor and the other end of the second output current circuit.

Claim 3

The composite transistor circuit according to claim 1, wherein said first predetermined ratio of an output current and said second predetermined ratio of an output current are substantially the same.

Claim 4

The composite transistor circuit according to claim 1, wherein said first predetermined ratio of an output current and said second predetermined ratio of an output current are different.

Claim 5

A differential amplifier circuit comprising: a composite transistor circuit for receiving a first input signal, said composite transistor circuit comprising: a first input transistor of a first polarity for receiving said first input signal, the emitter of said first input transistor being connected to a first power source; a first current mirror circuit formed of transistors of a second polarity, said first current mirror circuit comprising a first reference current circuit and a first output current circuit and producing an output current bearing a first predetermined ratio to a first reference current, and wherein one end of said first reference current circuit is connected to the collector of said first input transistor, and the other end of said first reference current circuit and one end of said first output current circuit are connected to a second power source; and a second current mirror circuit formed of transistors of said first polarity, said second current mirror circuit comprising a second reference current circuit and a second output current circuit and producing an output current bearing a second predetermined ratio to a second reference current, and wherein one end of said second reference current circuit is connected to the other end of said first output current circuit, and the other end of said second reference current circuit and one end of said second output current circuit are connected to the emitter of said first input transistor and said first power source; a second input transistor of said first polarity for receiving a second imput signal, the emitter of said second input transistor being connected to said first power source; and a third current mirror circuit formed of transistors of said second polarity, said third current mirror circuit comprising a third reference current circuit and a third output current circuit and producing an output current bearing a third predetermined ratio to a third reference current, and wherein one end of said third reference current circuit is connected to the collector of said second input transistor, and the other end of said third reference current circuit and one end of said third output current circuit are connected to said second power source and the other end of said third output current circuit is connected to the other end of said second output current circuit.

Claim 6

A differential amplifier circuit comprising: a composite transistor circuit for receiving a first input signal, said composite transistor circuit comprising: a first input transistor of a first polarity for receiving said first input signal, the emitter of said first input transistor being connected to a first power source; a first current mirror circuit formed of transistors of a second polarity, said first current mirror circuit comprising a first reference current circuit and a first output current circuit and producing an output current bearing a first predetermined ratio to a first reference current, and wherein one end of said first reference current circuit is connected to the collector of said first input transistor, and the other end of said first reference current circuit and one end of said first output current circuit are connected to a second power source; and a second current mirror circuit formed of transistors of said first polarity, said second current mirror circuit comprising a second reference current circuit and a second output current circuit and producing an output current bearing a second predetermined ratio to a second reference current, and wherein one end of said second reference current circuit is connected to the other end of said first output current circuit, and the other end of said second reference current circuit and one end of said second output current circuit are connected to the emitter of said first input transistor and said first power source; a second input transistor of said first polarity for receiving a second imput signal, the emitter of said second input transistor being connected to said first power source; and a third current mirror circuit formed of transistors of said second polarity, said third current mirror circuit comprising a third reference current circuit and a third output current circuit and producing an output current bearing a third predetermined ratio to a third reference current, and wherein one end of said third reference current circuit is connected to the collector of said second input transistor, and the other end of said third reference current circuit and one end of said third output current circuit are connected to said second power source and the other end of said third output current circuit is connected to the other end of said second output current circuit.

Claim 7

A voltage follower circuit comprising: a first composite transistor circuit for receiving a first input signal, said first composite transistor circuit comprising: a first input transistor of a first polarity for receiving said first input signal, the emitter of said first input transistor being connected to a first power source; a first current mirror circuit formed of transistors of a second polarity, said first current mirror circuit comprising a first reference current circuit and a first output current circuit and producing an output current having a first predetermined ratio to a first reference current, and wherein one end of said first reference current circuit is connected to the collector of said first input transistor, and the other end of said first reference current circuit and one end of said first output current circuit are connected to a second power source; and a second current mirror circuit formed of transistors of said first polarity, said second current mirror circuit comprising a second reference current circuit and a second output current circuit and producing an output current having a second predetermined ratio to a second reference current, and wherein one end of said second reference current circuit is connected to the other end of said first output current circuit, and the other end of said second reference current circuit and one end of said second output current circuit are connected to the emitter of said first input transistor and said first power source; a second composite transistor circuit for receiving a second input signal, said second composite transistor circuit comprising: a second input transistor of said first polarity for receiving said second input signal, the emitter of said second input transistor being connected to said first power source; a third current mirror circuit formed of transistors of said second polarity, said third current mirror circuit comprising a third reference current circuit and a third output current circuit and producing an output current having a third predetermined ratio to a third reference current, and wherein one end of said third reference current circuit is connected to the collector of said second input transistor, and the other end of said third reference current circuit and one end of said third output current circuit are connected to said second power source; and a fourth current mirror circuit formed of transistors of said first polarity, said fourth current mirror circuit comprising a fourth reference circuit and a fourth output current circuit and producing an output current having a fourth predetermined ratio to a fourth reference current, and wherein one end of said fourth reference current circuit is connected to the other end of said third output current circuit, and the other end of said fourth reference current circuit and one end of said fourth output current circuit are connected to the emitter of said second input transistor and said first power source; and a fifth current mirror circuit formed of transistors of said second polarity, said fifth current mirror circuit comprising a fifth reference current circuit and a fifth output current circuit and producing an output current having a fifth predetermined ratio to a fifth reference current, and wherein one end of said fifth reference current circuit is connected to the other end of said second output current circuit, one end of said fifth output current circuit is connected to the other end of said fourth output current circuit, and the other end of said fifth reference and output current circuits are connected to said second power source.

Claim 8

A voltage follower circuit comprising: a first composite transistor circuit for receiving a first input signal, said first composite transistor circuit comprising: a first input transistor of a first polarity for receiving said first input signal, the emitter of said first input transistor being connected to a first power source; a first current mirror circuit formed of transistors of a second polarity, said first current mirror circuit comprising a first reference current circuit and a first output current circuit and producing an output current having a first predetermined ratio to a first reference current, and wherein one end of said first reference current circuit is connected to the collector of said first input transistor, and the other end of said first reference current circuit and one end of said first output current circuit are connected to a second power source; and a second current mirror circuit formed of transistors of said first polarity, said second current mirror circuit comprising a second reference current circuit and a second output current circuit and producing an output current having a second predetermined ratio to a second reference current, and wherein one end of said second reference current circuit is connected to the other end of said first output current circuit, and the other end of said second reference current circuit and one end of said second output current circuit are connected to the emitter of said first input transistor and said first power source; a second composite transistor circuit for receiving a second input signal, said second composite transistor circuit comprising: a second input transistor of said first polarity for receiving said second input signal, the emitter of said second input transistor being connected to said first power source; a third current mirror circuit formed of transistors of said second polarity, said third current mirror circuit comprising a third reference current circuit and a third output current circuit and producing an output current having a third predetermined ratio to a third reference current, and wherein one end of said third reference current circuit is connected to the collector of said second input transistor, and the other end of said third reference current circuit and one end of said third output current circuit are connected to said second power source; and a fourth current mirror circuit formed of transistors of said first polarity, said fourth current mirror circuit comprising a fourth reference circuit and a fourth output current circuit and producing an output current having a fourth predetermined ratio to a fourth reference current, and wherein one end of said fourth reference current circuit is connected to the other end of said third output current circuit, and the other end of said fourth reference current circuit and one end of said fourth output current circuit are connected to the emitter of said second input transistor and said first power source; and a fifth current mirror circuit formed of transistors of said second polarity, said fifth current mirror circuit comprising a fifth reference current circuit and a fifth output current circuit and producing an output current having a fifth predetermined ratio to a fifth reference current, and wherein one end of said fifth reference current circuit is connected to the other end of said second output current circuit, one end of said fifth output current circuit is connected to the other end of said fourth output current circuit, and the other end of said fifth reference and output current circuits are connected to said second power source.