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US4620157A Expired / Lapsed US ⏱️ 0.0 years remaining

Reactive power to DC signal converter

Assignee: Yokogawa Electric Corp
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Filing: 1985-06-06
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Granted: 1986-10-28
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Expires: 2005-06-06
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Abstract

Abstract The output from a capacitor, which shifts a voltage output by π/2, and a detected frequency output, are multiplied by a pulse width modulation circuit, and a current input is switched by the multiplied output to convert a reactive power to a corresponding DC signal. The converter has improved frequency characteristics.

Inventors

  • 👤 Eiji Hayashi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 05:37
CPC Classifications
G; G01; G01R; G01R21/00; G01R21/001; G01R21/003

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 99 words
A reactive power to DC signal converter comprising a capacitor for shifting the phase of either a voltage input or a current input to an AC circuit; a frequency detector circuit for producing a signal proportional to a frequency in the AC circuit; a first multiplier circuit for multiplying the output from said capacitor by the output from said frequency detector circuit; a second multiplier circuit for multiplying the voltage input or the current input to the AC circuit by the output from said first multiplier circuits; and a smoothing circuit for smoothing the output from said second multiplier.
Claim 2
Dependent Claim 99 words
A reactive power to DC signal converter comprising a capacitor for shifting the phase of either a voltage input or a current input to an AC circuit; a frequency detector circuit for producing a signal proportional to a frequency in the AC circuit; a first multiplier circuit for multiplying the output from said capacitor by the output from said frequency detector circuit; a second multiplier circuit for multiplying the voltage input or the current input to the AC circuit by the output from said first multiplier circuits; and a smoothing circuit for smoothing the output from said second multiplier.
Claim 3
Dependent Claim 115 words
The converter of claim 1, wherein said frequency detector circuit comprises a frequency detector and a reciprocal generating circuit for generating a signal inversely proportional to the output from said frequency detector, said first multiplier circuit comprises a pulse width modulation circuit comprising an integrator and a voltage comparator having a hysteresis for comparing the output from said integrator with a voltage of a prescribed level, and means for applying the output from said voltage comparator, the output from said capacitor, and the output from said frequency detector circuit to said integrator for producing a pulse width modulation signal corresponding to the amplitude of the voltage input or the current input to the AC circuit.
Claim 4
Dependent Claim 38 words
The converter of claim 2, wherein said voltage comparator comprises first and second inverters connected in series to an input resistor, and a resistor for feeding the output from said second inverter therethrough back to said first inverter.
Claim 5
Dependent Claim 41 words
The converter of claim 2, wherein said voltage comparator comprises first and second NAND gates connected in series to an input resistor, and a resistor for feeding the output from said second NAND gate therethrough back to said first NAND gate.
Claim 6
Dependent Claim 23 words
The converter of claim 2, wherein said frequency detector circuit comprises an operational amplifier and a zener diode connected across said operational amplifier.
Claim 7
Dependent Claim 33 words
The converter of claim 2, wherein said reciprocal generating circuit comprises a transistor driven by the output from said frequency detector and a unidirectional integrator connected to an output terminal of said transistor.
Claim 8
Dependent Claim 40 words
The converter of claim 1, wherein said first and second multiplier circuits are provided for each of a plurality of phases and wherein said frequency detector circuit and said smoothing circuit are shared in common by said plurality of phases.
Claim 9
Dependent Claim 29 words
The converter of claim 7, wherein each of said first multiplier circuits comprises a pulse width modulation circuit, and each of said second multiplier circuits comprises a switch element.

References Cited (Backward Citations)

SU646267A1 Cited
JPS573049A Cited
US4454471A Cited
JPS59150349A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-10-27 1990-04-28 1990-10-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-10-27 1994-04-28 1994-10-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-10-27 1998-04-28 1998-10-28 $7700.00 Window Closed / Lapsed

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