Gate turn-off thyristor construction

Claim 1

A gate turn-off thyristor with low control power consumption comprising: a first emitter layer (8) of one conductivity type; a main base layer (7) of another conductivity type connected to said first emitter layer; a control base layer (6) of said one conductivity type connected to said main base layer; a second emitter layer (5) of said other conductivity type connected to said control base layer at a junction (20) therebetween which surrounds a portion of said second emitter layer; a second emitter contact (9) connected to said second emitter layer; a control base contact (10) connected to said control base layer and having an opening with a geometric shape that has a center, said opening having a boundary surrounding and spaced from said second emitter contact and said junction; a first emitter contact (11) connected to said first emitter layer; biasing means (12,13) connected to said contacts for applying a turn-off current to said control base contact; said control base layer having a lateral shunt resistance (R Q ) between said junction (20) and said control base contact (10); and means (14,14') for turning said turn-off thyristor off by a short circuiting of said control base contact (10) with said second emitter contact (9), connected between said control base and second emitter contacts; the surface resistance (ρ s ) of said control base layer (6) between said center and said control base contact boundary being selected so that, with a control base turn-off current which is sufficient for turning off the thyristor, a potential appears on said lateral shunt resistance (R Q ) which is less than that appearing at said junction (20) whereby the difference between said potentials is used as an additional driving potential for a carrier current flowing over said lateral resistance and said control base contact by said means for turning said gate turn-off thyristor off.