Dead time compensation circuit for radiation detector

Claim 2

In a rate meter type random event counter circuit having a dead time characteristic wherein two or more successive random events during a predetermined period of time erroneously generate an event count signal indicative of only a single count, the occurrence of such erroneous single count signals increasing as the frequency of the random events increases, the random event counter circuit including active circuit element means having an input responding to event count signals including as a portion thereof said erroneous single count signals, and an output providing a signal having a value intended to indicate the actual rate of the random events, a dead time compensation circuit comprising: means for detecting the frequency of said event count signals; and means responsive to the detecting means for non-linearly modifying a transfer function of the active circuit element means as a direct function of the frequency of the event count signals so that the said value of the output signal from the circuit element means increases and decreases in substantially linear proportion to the actual number of random events per unit of time regardless of the proportion of said event count signals constituted by said erroneous single count signals.

Claim 3

A dead time compensation circuit according to claim 1, wherein said circuit element means is an amplifier responding to said event count signals in a non-linear manner as the frequency of event count signals increases, the gain of the amplifier being greater at higher event count frequencies than at lower event count frequencies.

Claim 4

In a rate meter type random event counter circuit having a dead time characteristic wherein two or more successive random events during a predetermined period of dead time erroneously generate an event count signal indicative of only a single count, the occurrence of such erroneous single count signals increasing as the frequency of the random events increases, the random event counter circuit including operational amplifier circuit means having a closed loop voltage gain, and having an input responding to event count signals including as a portion thereof said erroneous single count signals, and an output providing a signal having a value intended to indicate the actual rate of random events, a dead time compensation circuit comprising: means for detecting the frequency of the event count signals; and means responsive to the detecting means for non-linearly varying the closed loop voltage gain of the operational amplifier as a direct function of the frequency of the event count signals so that the said value of the output signal from the operational amplifier increases and decreases substantially linear in proportion to the actual number of random events per unit of time regardless of the proportion of said event count signals constituted by said erroneous single count signals.

Claim 5

In a rate meter type random event counter circuit having a dead time characteristic wherein two or more successive random events during a predetermined period of dead time erroneously generate an event count signal indicative of only a single count, the occurrence of such erroneous single count signals increasing as the frequency of the random events increases, the random event counter circuit including operational amplifier circuit means having a closed loop voltage gain, and having an input responding to event count signals including as a portion thereof said erroneous single count signals, and an output providing a signal having a value intended to indicate the actual rate of random events, a dead time compensation circuit comprising: means for detecting the frequency of the event count signals; and means responsive to the detecting means for non-linearly varying the closed loop voltage gain of the operational amplifier as a direct function of the frequency of the event count signals so that the said value of the output signal from the operational amplifier increases and decreases substantially linear in proportion to the actual number of random events per unit of time regardless of the proportion of said event count signals constituted by said erroneous single count signals.

Claim 6

A dead time compensation circuit according to claim 3, wherein said means for detecting the frequency of the event count signals includes a normally conducting analog switch switched to a non-conducting condition for a fixed time period for each signal constituting said event count signals, said compensation circuit further including a closed loop voltage gain compensation circuit element connected, via said analog switch, to a voltage gain determining portion of said operational amplifier circuit means only when said analog switch is in said conducting condition, wherein the gain of said operational amplifier circuit means is dependent on the duty cycle of the analog switch.

Claim 7

A dead time compensation circuit according to claim 4, wherein said voltage gain determining portion of said operational amplifier circuit means is constituted by a resistor network connected to the operational amplifier, the effective resistance of said network being determined by the duty cycle of said analog switch.

Claim 8

A dead time compensation circuit according to claim 4, wherein said gain compensation circuit element is a resistor, said operational amplifier circuit means having an associated gain determining resistor, said resistor being connected in parallel relation with the gain determining resistor of said operational amplifier circuit means only when said analog switch is in a conducting condition.

Claim 9

A dead time compensation circuit according to claim 4, including a monostable multivibrator, the fixed time period during which said analog switch does not conduct being determined by the monostable multivibrator triggered by each of said event count signals.

Claim 10

A dead time compensation circuit according to claim 7, wherein said fixed time period is less than said predetermined period of dead time.