FM demodulator with temperature compensation

Claim 2

A demodulator circuit for processing a pair of oppositely-phased rectangular-wave signals derived from a frequency-modulated (fm) signal, said circuit comprising: circuit means having a separate circuit path for processing each of said rectangular-wave signals, each circuit path including (a) means for inverting a respective one of said rectangular-wave signals, (b) means for delaying selected transitions of the inverted rectangular-wave signal said delaying means comprising voltage means for raising the output level of said inverting means to a predetermined level and means for providing a shunt capacitance which is charged by said voltge means in the course of raising said output level, (c) means for generating a logic output from a combination of said respective rectangular-wave signal and said inverted rectangular-wave signal, said logic output comprising a stream of pulses which are generated whenever the levels of both signals of said combination of signals having a predetermined relationship relative to a logic threshold; and means for combining the logic output pulse streams from said logic generating means in each circuit path to obtain a composite pulse signal having a pulse repetition rate that is twice the carrier frequency of the fm signal.

Claim 3

A demodulator as claimed in claim 1 further comprising: low pass filter means for generating a demodulated signal from the composite pulse signal output by said logic output combined means.

Claim 4

A demodulator as claimed in claim 1 in which said voltage means comprises a source of supply voltage and a resistor connected between said source and the output of said inverting means and said shunt capacitance means comprises a capacitor connected between the output of said inverting means and a circuit ground level.

Claim 5

A demodulator as claimed in claim 1 in which said logic generating means comprises a NOR logic gate.

Claim 6

A demodulator as claimed in claim 1 further comprising means in at least one of said circuit paths for adjusting said delaying means so that the output pulses from said logic generating means in each circuit path are substantially equal in pulse width.

Claim 7

A demodulator as claimed in claim 1 in which said inverting means in said separate circuit paths are thermally coupled such that temperature-caused circuit variations are identical.

Claim 8

A demodulator as claimed in claim 1 in which said logic generating means in said separate circuit paths are thermally coupled such that temperature-caused circuit variations are identical.

Claim 9

A demodulator circuit for processing a frequency modulated (fm) signal separated into two rectangular-wave signals having opposite phases, said circuit comprising: circuit means having a separate signal path for processing each of said rectangular-wave signals, each signal path including (a) an inverting circuit, (b) a dual-input logic circuit for generating an output pulse signal whenever the logic levels at both inputs are lower than a logic threshold, (c) a first circuit connection for supplying a respective one of said rectangular-wave signals to said inverting circuit and to an input of said logic circuit, (d) a second circuit connection for supplying an output signal from said inverting circuit to the other input of said logic circuit, (e) voltage means coupled to said second circuit connection for pulling the output voltage of said inverting circuit up to a predetermined level whenever said inverting circuit output switches from a low to a high logic level, (f) means for providing a shunt capacitance at the output of said inverting circuit which is charged by said voltage means in the course of pulling said output voltage high; and means for combining the output pulse signals from the respective ones of said logic circuits in each signal path to obtain a composite pulse signal having a pulse repetition rate that is twice the carrier frequency of the fm signal.

Claim 10

A demodulator circuit for processing a frequency modulated (fm) signal separated into two rectangular-wave signals having opposite phases, said circuit comprising: circuit means having a separate signal path for processing each of said rectangular-wave signals, each signal path including (a) an inverting circuit, (b) a dual-input logic circuit for generating an output pulse signal whenever the logic levels at both inputs are lower than a logic threshold, (c) a first circuit connection for supplying a respective one of said rectangular-wave signals to said inverting circuit and to an input of said logic circuit, (d) a second circuit connection for supplying an output signal from said inverting circuit to the other input of said logic circuit, (e) voltage means coupled to said second circuit connection for pulling the output voltage of said inverting circuit up to a predetermined level whenever said inverting circuit output switches from a low to a high logic level, (f) means for providing a shunt capacitance at the output of said inverting circuit which is charged by said voltage means in the course of pulling said output voltage high; and means for combining the output pulse signals from the respective ones of said logic circuits in each signal path to obtain a composite pulse signal having a pulse repetition rate that is twice the carrier frequency of the fm signal.

Claim 11

A demodulator circuit as claimed in claim 8 in which said inverting circuit in each signal path is thermally coupled with the other by being formed in a common integrated circuit package.

Claim 12

A demodulator circuit as claimed in claim 9 in which said logic circuit in each signal path is thermally coupled with the other by being formed in a common integrated circuit package.

Claim 13

A demodulator circuit as claimed in claim 10 further comprising: low pass filter means for separating a demodulated signal from the composite pulse signal obtained from said combining means, said low pass filter means having a cutoff frequency below the pulse repetition rate of the composite pulse signal.

Claim 14

A demodulator circuit for processing a frequency-modulated (fm) signal, said circuit comprising: means responsive to the fm signal for generating first and second rectangular-wave signals having opposite phases to each other; first and second thermally-coupled inverting circuits having output signal levels that are the inverse of their input signal levels; first and second thermally-coupled dual-input logic circuits for generating an output pulse whenever the logic levels at both inputs are lower than a logic threshold; first circuit means for supplying a) said first rectangular-wave signal to said first inverting circuit and to an input of said first logic circuit and b) said second rectangular wave signal to said second inverting circuit and to an input of said second logic circuit; second circuit means for connecting a) the output of said first inverting circuit to the other input of said first logic circuit and b) the output of said second inverting circuit to the other input of said second logic circuit; a source of supply voltage; first and second shunt capacitors connected to respective outputs of said first and second inverting circuits; output means connected to said second circuit means for respectively raising the output level of each inverter up to said supply voltage while charging the respective shunt capacitor, said rise in output level occurring when the respective inverter switches from a low to a high output level and providing a brief period during which the logic levels at both inputs to the respective logic circuit is lower than said logic threshold; and means for summing the outputs of said first and second logic circuits to obtain a composite pulse stream signal having a pulse repetition rate that is twice the carrier frequency of the fm signal.

Claim 15

A demodulator circuit for processing a frequency-modulated (fm) signal, said circuit comprising: means responsive to the fm signal for generating first and second rectangular-wave signals having opposite phases to each other; first and second thermally-coupled inverting circuits having output signal levels that are the inverse of their input signal levels; first and second thermally-coupled dual-input logic circuits for generating an output pulse whenever the logic levels at both inputs are lower than a logic threshold; first circuit means for supplying a) said first rectangular-wave signal to said first inverting circuit and to an input of said first logic circuit and b) said second rectangular wave signal to said second inverting circuit and to an input of said second logic circuit; second circuit means for connecting a) the output of said first inverting circuit to the other input of said first logic circuit and b) the output of said second inverting circuit to the other input of said second logic circuit; a source of supply voltage; first and second shunt capacitors connected to respective outputs of said first and second inverting circuits; output means connected to said second circuit means for respectively raising the output level of each inverter up to said supply voltage while charging the respective shunt capacitor, said rise in output level occurring when the respective inverter switches from a low to a high output level and providing a brief period during which the logic levels at both inputs to the respective logic circuit is lower than said logic threshold; and means for summing the outputs of said first and second logic circuits to obtain a composite pulse stream signal having a pulse repetition rate that is twice the carrier frequency of the fm signal.

Claim 16

The circuit as claimed in claim 12 addtionally comprising means for adjusting said output means with respect to the output level of one of said inverters so that said brief periods of simultaneously low logic levels are so balanced that respective output pulses generated by said logic circuits are substantially equal in width.

Claim 17

The circuit as claimed in claim 12 in which said first and second logic circuits comprise first and second NOR gates.

Claim 18

The circuit as claimed in claim 12 in which said output means comprises a pull-up resistor connected between said source of supply voltage and said second circuit means.