US4613860A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Coder-decoder for purged binary block codes
Assignee: Unisys Corp
•
Filing: 1983-12-14
•
Granted: 1986-09-23
•
Expires: 2003-12-14
Abstract
Abstract Transmitting and receiving apparatus for transmitting data includes a purged code encoder at the transmitter for encoding digital data into constant weight unbalanced codewords representative of the digital data. The constant weight unbalanced codewords containing error correction bits are preferably transmitted as balanced codewords and are decoded at the receiver employing Golay decoders or algebraic decoders to recover the original digital data without the requirement of a large number of matched filter previously employed for decoding.
Inventors
- 👤 Robert J. Currie
- 👤 Craig K. Rushforth
- 👤 John W. Zscheile, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 08:24
CPC Classifications
H; H03; H03M; H03M13/00; H03M13/03; H03M13/05; H03M5/00; H03M5/02; H03M5/04; H03M5/14; H03M5/145
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
170 words
Transmitting and receiving apparatus, comprising: means for generating balanced code set signals, means for generating digital data signals, a purged code encoder coupled to said digital data signals for generating constant-weight unbalanced codewords defining said data signals and containing error correction bits, means for combining said balanced code set signals and said unbalanced codewords to provide balanced digital signals defining said data signals and containing error correction bits for transmission, transmitting means, means for receiving said balanced digital signals containing error correction bits, detector means comprising carrier tracking loop means connected to said receiving means for tracking said received signals, said detector means adapted to remove said balanced code set signals and for recovering said unbalanced codewords and having bit synchronization signal means, word synchronization signal means and means for producing quantized data bit signals, and purged code decoder means coupled to said bit synchronization signal means, said word synchronization signal means and said quantized data bit signals for producing a best estimate of said data signals as an output.
Claim 2
Dependent Claim
170 words
Transmitting and receiving apparatus, comprising: means for generating balanced code set signals, means for generating digital data signals, a purged code encoder coupled to said digital data signals for generating constant-weight unbalanced codewords defining said data signals and containing error correction bits, means for combining said balanced code set signals and said unbalanced codewords to provide balanced digital signals defining said data signals and containing error correction bits for transmission, transmitting means, means for receiving said balanced digital signals containing error correction bits, detector means comprising carrier tracking loop means connected to said receiving means for tracking said received signals, said detector means adapted to remove said balanced code set signals and for recovering said unbalanced codewords and having bit synchronization signal means, word synchronization signal means and means for producing quantized data bit signals, and purged code decoder means coupled to said bit synchronization signal means, said word synchronization signal means and said quantized data bit signals for producing a best estimate of said data signals as an output.
Claim 3
Dependent Claim
25 words
Transmitting and receiving apparatus as set forth in claim 1 wherein said purged code encoder comprises input memory means having said unbalanced codewords stored therein.
Claim 4
Dependent Claim
29 words
Transmitting and receiving apparatus as set forth in claim 1 wherein said purged code encoder comprises: input memory means coupled to an encoder for generating said constant-weight unbalanced codewords.
Claim 5
Dependent Claim
31 words
Transmitting and receiving apparatus as set forth in claim 1 wherein said purged code encoder comprises: input memory means coupled to an extended Golay encoder for generating said constant-weight unbalanced codeword.
Claim 6
Dependent Claim
36 words
Transmitting and receiving apparatus as set forth in claim 4 wherein said purged code decoder comprises an extended Golay decoder, and output memory means coupled to said extended Golay decoder for producing said data output signals.
Claim 7
Dependent Claim
20 words
Transmitting and receiving apparatus as set forth in claim 1 wherein said purged code decoder comprises a matched filter decoder.
Claim 8
Dependent Claim
36 words
Transmitting and receiving apparatus as set forth in claim 1 wherein said purged code decoder comprises: a hard decision algebraic decoder, and output memory means coupled to said algebraic decoder for producing said data output signals.
Claim 9
Dependent Claim
36 words
Transmitting and receiving apparatus as set forth in claim 1 wherein said purged code decoder comprises: a soft decision algebraic decoder, and output memory means coupled to said algebraic decoder for producing said data output signals.
Claim 10
Dependent Claim
29 words
Transmitting and receiving apparatus as set forth in claim 7 wherein said data output signals from said output memory means include correct data signals and detectable erroneous data signals.
Claim 11
Dependent Claim
31 words
Transmitting and receiving apparatus as set forth in claim 9 wherein said data output signals from said output memory means further include a very small percentage of undetectable erroneous data signals.
Claim 12
Dependent Claim
65 words
Transmitting and receiving apparatus as set forth in claim 1 wherein said purged code encoder comprises a set of 128 unbalanced codewords having twenty-four bits each, a weight of eight and an average distance structure of: one word at a distance of zero, 44 words at a distance of eight, 80 words at a distance of twelve and three words at a distance of sixteen.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-09-22 | 1990-03-24 | 1990-09-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-09-22 | 1994-03-24 | 1994-09-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-09-22 | 1998-03-24 | 1998-09-23 | $7700.00 | Window Closed / Lapsed |