Memory arrangement with ordered writing particularly intended for cooperation with a radar image display unit

Claim 1

A memory arrangement for storing radar data for use by a display unit, said arrangement comprising: (a) a main memory having a multiplicity of addressable memory locations for storing respective data words; (b) an input circuit having an output electrically connected to a data input of the main memory, an input for receiving data words to be stored in said main memory at respective ones of the memory locations, and a control element for controlling the writing of data words into the main memory; (c) memory means having a multiplicity of addressable memory locations corresponding to those in the main memory; and (d) a write circuit having an output electrically connected to a data input of the memory means and an input for receiving an updating signal indicating whether the main memory is being updated with new data words, said write circuit effecting the writing in said memory means of: 1. a predetermined first word in each memory location for which a new data word is written into the corresponding memory location in the main memory; and 2. a predetermined second word in all other memory locations; said control element having an input electrically connected to an output of the memory means for periodically receiving the predetermined first and second words stored in said memory means, said control element periodically effecting writing an invalidation data word in all memory locations of the main memory corresponding to memory locations in said memory means from which one of the predetermined second words is received.