US4611229A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Auto range horizontal automatic phase control
Assignee: Zenith Electronics LLC
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Filing: 1983-06-17
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Granted: 1986-09-09
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Expires: 2003-06-17
Abstract
Abstract A circuit for phase locking the flyback pulse to a reference signal. A phase detector receives the flyback pulse (to be phase locked) and receives the reference signal. It outputs an error signal to a control circuit including first and second differential amplifiers having differing operational characteristics, one being linear in a narrower range than the other. The differential amplifier having the larger linearity range provides control signals to a coarse delay adjust circuit in the form of a programmable divider which also receives clock pulses at a high multiple of the horizontal frequency f H . The output of the coarse delay adjust circuit is applied to a fine delay adjust circuit responsively connected to the output of the first differential amplifier, which is linear over the narrower range. The output of the fine delay adjust circuit is coupled to the horizontal system. Large changes in the phase of the flyback signal are achieved by recognizing large deviations in the wider range differential amplifier and causing the coarse delay adjust circuit to make a relatively large adjustment in the phase of the output signals thereof. Thereafter, fine adjustments are made by the fine delay adjustment circuit in response to control signals from the narrower range differential amplifier.
Inventors
- 👤 Gopal K. Srivastava
- 👤 Ronald B. Lee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 19:02
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/04; H04N5/12
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
143 words
A circuit for phase locking the flyback pulse of a television horizontal system to a reference signal comprising: a detector coupled to determine phase differences between the flyback pulse and the reference signal and arranged to provide an error signal indicating said phase differences; a control circuit coupled to receive said error signal and including a first amplifier providing a first control signal which is analog, said control circuit also providing a second control signal; a first delay circuit coupled to respond to said first control signal; a second delay circua second control signal; a first delay circuit coupled to respond to said first control signal; a second delay circuit coupled to respond to said second control signal; said delay circuits being arranged to output a phase adjusted signal to said television horizontal system thereby to control the timing of the flyback pulse.
Claim 2
Dependent Claim
143 words
A circuit for phase locking the flyback pulse of a television horizontal system to a reference signal comprising: a detector coupled to determine phase differences between the flyback pulse and the reference signal and arranged to provide an error signal indicating said phase differences; a control circuit coupled to receive said error signal and including a first amplifier providing a first control signal which is analog, said control circuit also providing a second control signal; a first delay circuit coupled to respond to said first control signal; a second delay circua second control signal; a first delay circuit coupled to respond to said first control signal; a second delay circuit coupled to respond to said second control signal; said delay circuits being arranged to output a phase adjusted signal to said television horizontal system thereby to control the timing of the flyback pulse.
Claim 3
Dependent Claim
30 words
The circuit according to claim 1 wherein said first amplifier provides an output which is linear over a first range of input valves, said output constituting said first control signal.
Claim 4
Dependent Claim
44 words
The circuit according to claim 2 wherein said control circuit further comprises a second amplifier whose output is linear over a second range of input values wider than said first range, said second control signal being based upon the output of said second amplifier.
Claim 5
Dependent Claim
37 words
The circuit according to claim 2 wherein said control circuit is coupled to provide said second control signal and wherein said second control signal indicates when said error signal is outside a second range of input values.
Claim 6
Dependent Claim
50 words
The circuit according to claim 1 wherein said control circuit includes said first amplifier providing said first control signal according to a first function of said error signal, said control circuit further comprising a second amplifier providing said second control signal according to a second function of said error signal.
Claim 7
Dependent Claim
140 words
The circuit according to claim 1 wherein said first amplifier comprises: a first differential amplifier coupled to receive said error signal, said first differential amplifier being arranged to provide said first control signal, said first control signal varying in accordance with a first function with respect to said error signal, said function being linear over a first range of input values; and wherein said control circuit further comprises a second differential amplifier coupled to receive said error signal and to provide an output signal varying according to a second function with respect to said error signal and being linear over a second range of input values, said second range being wider than said first range, said second control signal being derived from said output signal of said second differential amplifier and indicating when said input is outside said second range.
Claim 8
Dependent Claim
16 words
The circuit according to claim 1 wherein said second delay circuit includes an adjustable divider circuit.
Claim 9
Dependent Claim
48 words
The circuit according to claim 1 wherein said first delay circuit is coupled to receive output signals from said second delay circuit at a phase determined by said second delay circuit, said second delay circuit being coupled to receive at an input signals related to the horizontal frequency.
Claim 10
Independent Claim
147 words
A method for automatically phase locking the flyback pulse of a television horizontal system to a reference pulse comprising the steps of: detecting a phase difference between the flyback pulse and the reference pulse and providing an error signal indicative of said phase difference; providing a first control signal which is linear over a first range of input values, based on said error signal and providing a second control signal which is linear over a second range of input values wider than said first range; making coarse adjustments to the phase of said flyback pulse based on said second control signal to reduce said phase difference when said flyback pulse deviates from the phase of said reference pulse by more than a predetermined value; and making fine adjustments in the phase of said flyback pulse based on said first control signal to further reduce said phase difference.
Claim 11
Independent Claim
147 words
A method for automatically phase locking the flyback pulse of a television horizontal system to a reference pulse comprising the steps of: detecting a phase difference between the flyback pulse and the reference pulse and providing an error signal indicative of said phase difference; providing a first control signal which is linear over a first range of input values, based on said error signal and providing a second control signal which is linear over a second range of input values wider than said first range; making coarse adjustments to the phase of said flyback pulse based on said second control signal to reduce said phase difference when said flyback pulse deviates from the phase of said reference pulse by more than a predetermined value; and making fine adjustments in the phase of said flyback pulse based on said first control signal to further reduce said phase difference.
Claim 12
Dependent Claim
60 words
The circuit according to claim 9 wherein said step of providing the first and the second control signals includes providing said first control signal according to a linear function when said error signal is within said first range of input values and wherein said second control signals indicates when said error signal is outside said second range of input values.
Claim 13
Dependent Claim
37 words
The method of claim 10 wherein said first control signal is developed according to said linear function of said error signal and said second control signal is provided according to a second function of said error signal.
Claim 14
Dependent Claim
25 words
The method according to claim 9 wherein said step of providing coarse adjustments includes selecting a divisor and dividing high frequency signals with said divisor.
Claim 15
Dependent Claim
133 words
A circuit for phase locking the flyback pulse of a television horizontal system to a reference signal comprising: a detector coupled to determine phase differences between the flyback pulse and the reference signal, and arranged to provide an error signal indicating said phase differences; a control circuit coupled to receive said error signal and to provide first and second control signals; a first delay circuit coupled to respond to said first control signal; a second delay circuit coupled to respond to said second control signal, said first delay circuit being coupled to receive signals from said second delay circuit at a phase determined by said second delay circuit, said first delay circuit being arranged to output a phase adjusted signal to the horizontal system thereby to control the timing of the flyback pulse.
Claim 16
Dependent Claim
133 words
A circuit for phase locking the flyback pulse of a television horizontal system to a reference signal comprising: a detector coupled to determine phase differences between the flyback pulse and the reference signal, and arranged to provide an error signal indicating said phase differences; a control circuit coupled to receive said error signal and to provide first and second control signals; a first delay circuit coupled to respond to said first control signal; a second delay circuit coupled to respond to said second control signal, said first delay circuit being coupled to receive signals from said second delay circuit at a phase determined by said second delay circuit, said first delay circuit being arranged to output a phase adjusted signal to the horizontal system thereby to control the timing of the flyback pulse.
Claim 17
Dependent Claim
27 words
The circuit according to claim 13 wherein said control circuit includes a first amplifier providing said first control signal and wherein said first control signal is analog.
Claim 18
Dependent Claim
59 words
The circuit according to claim 14 wherein said control circuit includes said first amplifier and a second amplifier, said first and second amplifiers each having outputs which are linear over respective first and second ranges of input values, said range over which said second amplifier is linear being wider than said range in which said first amplifier is linear.
Claim 19
Dependent Claim
29 words
The circuit according to claim 15 wherein said control circuit provides said second control signal which indicates when said error signal is outside said second range of input values.
Claim 20
Dependent Claim
138 words
The circuit according to claim 13 wherein said control circuit comprises: a first differential amplifier coupled to receive said error signal, said first differential amplifier being arranged to provide said first control signal, said first control signal varying in accordance with a first function with respect to said error signal, said function being linear over a first range of values of said error signal; and a second differential amplifier coupled to receive said error signal and to provide an output varying according to a second function with respect to said error signal and being linear over a second range of values of said error signal, said second range being wider than said first range, said second control signal being derived from the output of said second differential amplifier and indicating when said output is outside its linear range.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-09-08 | 1990-03-10 | 1990-09-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-09-08 | 1994-03-10 | 1994-09-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-09-08 | 1998-03-10 | 1998-09-09 | $7700.00 | Window Closed / Lapsed |