Battery charger having automatic deep discharge mode

Claim 1

A battery charger for supplying current to a rechargable battery comprising: a counter having at least first, second, third and fourth counting states occurring repetitively in sequence in response to applied clock pulses, said counter remaining in said first counting state in response to an applied reset signal, and providing first, second and third charge control signals indicative of said first second and fourth counting states, respectively; battery charging circuit means responsive to said charge control signals for supplying current to the battery, said current comprising a relatively low trickle charge current in the presence of said first charge control signal, a relatively larger fast charge current in the presence of said second charge contol signal, and a deep discharge current in the presence of said third charge control signal; battery voltage sensing means responsive to the terminal voltage of the battery for providing a first mode control signal in response to said battery voltage exceeding a first predetermined reference level, and a second mode control signal in response to said battery voltage falling below a second predeermined reference level; a source of continuous clock pulses for advancing said counter progressively through said first, second, third and fourth counting states; circuit means responsive to said first mode control signal for applying a reset signal to said counter to maintain said counter in said first counting state when said battery voltage exceeds said first predetermined reference level, and for applying said clock pulses to said counter to advance said counter from said first to said second counting state when said battery voltage falls below said first predetermined reference level; and a user actuated switch; circuit means for applying said clock pulses to said counter to advance said counter to said fourth counting state upon actuation of said user-actuated switch, and for maintaining said counter in said fourth counting state concurrently with said battery voltage remaining above said second predetermined reference level; and circuit means responsive to said second mode control signal for applying said clock pulses to said counter to advance said counter from said fourth counting state upon said battery voltage falling below said second predetermined reference level.