US4608602A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit for generating a control signal for the field deflection in a picture display device
Assignee: US Philips Corp
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Filing: 1984-09-10
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Granted: 1986-08-26
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Expires: 2004-09-10
Abstract
Abstract A circuit for generating a control signal for the field deflection in a picture display device which is suitable for displaying an interlaced picture. The circuit comprises a field identification circuit, with the aid of which a distinction can be made between the two fields which form a picture, and a signal selection circuit for setting the sequence of occurrence of a first field signal which corresponds to a first field, and a second field signal which corresponds to a subsequent second field. The circuit enables a choice between a picture with or without interlace, it further being optionally possible to eliminate the interlace by shifting a field upwards or downwards relative to the other field.
Inventors
- 👤 Timothy R. Grantham-Hill
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 02:34
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/04; H04N5/08; H04N5/10; G; G09; G09G; G09G1/00; G09G1/04; H04N3/00; H04N3/10; H04N3/16
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
162 words
A circuit for generating a control signal for field deflection in a picture display device, comprising an input for receiving a composite synchronizing signal intended for controlling the display of an interlaced picture, a field identification circuit connected to the synchronizing signal input for producing a first field signal on receipt of a first field and a second field signal on receipt of a subsequent second field, the second field signal deviating from the first field signal, and an address generator coupled to the field identification circuit for generating signals for controlling the transfer of the control signal, formed by said first and second field signals, for the field deflection, characterized in that the circuit further comprises a signal selection circuit coupled to the field identification circuit and the address generator for receiving said first and second field signals and for setting the sequence in which the first and second field signals occur in said control signal appearing at an output thereof.
Claim 2
Dependent Claim
162 words
A circuit for generating a control signal for field deflection in a picture display device, comprising an input for receiving a composite synchronizing signal intended for controlling the display of an interlaced picture, a field identification circuit connected to the synchronizing signal input for producing a first field signal on receipt of a first field and a second field signal on receipt of a subsequent second field, the second field signal deviating from the first field signal, and an address generator coupled to the field identification circuit for generating signals for controlling the transfer of the control signal, formed by said first and second field signals, for the field deflection, characterized in that the circuit further comprises a signal selection circuit coupled to the field identification circuit and the address generator for receiving said first and second field signals and for setting the sequence in which the first and second field signals occur in said control signal appearing at an output thereof.
Claim 3
Dependent Claim
60 words
A circuit as claimed in claim 1, characterized in that the signal selection circuit comprises a sequence circuit having a first input for receiving the first field signal, a second input for receiving the second field signal, a selection input for receiving the signals from the address generator, and an output for conveying the control signal for the field deflection.
Claim 4
Dependent Claim
117 words
A circuit as claimed in claim 2, characterized in that the first field signal is a signal of the field frequency, whose phase is substantially fixed relative to the incoming synchronizing signal, while the second field signal is also a signal of the field frequency which is delayed by half a line period relative to the first field signal, the signals from the address generator being formed by two address signals, the first field signal being conveyed at the occurrence of a first of said address signals, whereas the second field signal is conveyed at the occurrence of a second of said address signals, the sequence of occurrence of the first and second address signals being adjustable.
Claim 5
Dependent Claim
85 words
A circuit as claimed in claim 3, the address generator being a bistable element to which a signal of the field frequency is applied as a clock signal, characterized in that the signal selection circuit further comprises a first change-over switch for alternatively applying a signal of the picture frequency, derived from said first and second field signals, to a setting or a resetting input, respectively, of the bistable element whose output signals have the picture frequency and are the first and second address signals.
Claim 6
Dependent Claim
44 words
A circuit as claimed in claim 3, characterized in that the signal selection circuit further comprises a second change-over switch for alternatively conveying the first field signal or the output signal of the sequence circuit, respectively, as the control signal for the field deflection.
References Cited (Backward Citations)
US3382320A
Cited
US4408197A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-08-25 | 1990-02-24 | 1990-08-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-08-25 | 1994-02-24 | 1994-08-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-08-25 | 1998-02-24 | 1998-08-26 | $7700.00 | Window Closed / Lapsed |