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US4608543A Expired / Lapsed US ⏱️ 0.0 years remaining

Controllable effective resistance and phase lock loop with controllable filter

Assignee: RPX Corp
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Filing: 1984-12-17
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Granted: 1986-08-26
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Expires: 2004-12-17
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Abstract

Abstract Disclosed is a circuit providing a controllable effective resistance which comprises of transistor means that provides current at an input node responsive to an input voltage at the input node. The transistor means is coupled to a settable current source which operates to control the effective value of the controllable effective resistance. The invention also includes a filter which employs the controllable effective resistance to vary the breakpoint frequency of the filter. Also, a phase-locked loop apparatus employing the filter is disclosed.

Inventors

  • 👤 Neil R. Adams

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 16:57
CPC Classifications
H; H03; H03H; H03H11/00; H03H11/46

Claims Analysis

Total Claims: 21
Claim 1
Independent Claim 187 words
An apparatus comprising: a differential pair of transistors, one of said transistors being base biased in response to an input voltage and the other of said transistors being base biased in response to a reference voltage, said differential pair of transistors providing an output current at an output node of said differential pair of transistors which is proportional to the difference between said reference voltage and said input voltage, said input voltage being supplied to an input node of said differential pair of transistors, the constant of proportionality being determinable by a selectable current source means; said current source means comprising a first variable current source means, responsive to a control signal, for providing a first settable current at the collector of said one transistor and a second variable current source means, responsive to the control signal, for providing a second settable current at the emitters of said differential pair of transistors, both first and second said settable currents acting in conjunction to affect the magnitude of the output current; and control means for supplying the control signal to said first and second variable current source means.
Claim 2
Independent Claim 187 words
An apparatus comprising: a differential pair of transistors, one of said transistors being base biased in response to an input voltage and the other of said transistors being base biased in response to a reference voltage, said differential pair of transistors providing an output current at an output node of said differential pair of transistors which is proportional to the difference between said reference voltage and said input voltage, said input voltage being supplied to an input node of said differential pair of transistors, the constant of proportionality being determinable by a selectable current source means; said current source means comprising a first variable current source means, responsive to a control signal, for providing a first settable current at the collector of said one transistor and a second variable current source means, responsive to the control signal, for providing a second settable current at the emitters of said differential pair of transistors, both first and second said settable currents acting in conjunction to affect the magnitude of the output current; and control means for supplying the control signal to said first and second variable current source means.
Claim 3
Dependent Claim 19 words
The apparatus of claim 1, further including: means for minimizing base current leakage through said differential pair of transistors.
Claim 4
Independent Claim 99 words
An apparatus having a controllable effective resistance, comprising: current source means, responsive to a control signal, for providing a settable current; transistor means coupled to said current source means for providing current at an input node proportional to the difference between an input voltage supplied at said input node and a reference voltage, to thereby provide an effective resistance, the value of said effective resistance being determinable by the settable current; control means for providing the control signal to said current source means for setting the settable current; and means for minimizing base current leakage through said transistor means.
Claim 5
Independent Claim 99 words
An apparatus having a controllable effective resistance, comprising: current source means, responsive to a control signal, for providing a settable current; transistor means coupled to said current source means for providing current at an input node proportional to the difference between an input voltage supplied at said input node and a reference voltage, to thereby provide an effective resistance, the value of said effective resistance being determinable by the settable current; control means for providing the control signal to said current source means for setting the settable current; and means for minimizing base current leakage through said transistor means.
Claim 6
Dependent Claim 17 words
The apparatus of claim 3, further comprising: means for biasing said transistor means within a operating range.
Claim 7
Dependent Claim 34 words
The apparatus of claim 3, wherein: said transistor means provides an output current proportional to the negative of the input voltage at the input node, whereby the apparatus has a negative controllable effective resistance.
Claim 8
Independent Claim 128 words
An apparatus having a controllable effective resistance formed on a semiconductor wafer, comprising: a differential pair of transistors, one of said transistors being base biased in response to an input voltage into an input node, the other of said transistors being base biased in response to a reference voltage; a first variable current source means, responsive to a control signal, for providing a first settable current at the collector of said one transistor; a second variable current source means, responsive to the control signal, for providing a second settable current at the emitters of said differential pair of transistors; control means for supplying the control signal to said first and second variable current source means; and means coupling the collector of said one transistor to the input node.
Claim 9
Independent Claim 128 words
An apparatus having a controllable effective resistance formed on a semiconductor wafer, comprising: a differential pair of transistors, one of said transistors being base biased in response to an input voltage into an input node, the other of said transistors being base biased in response to a reference voltage; a first variable current source means, responsive to a control signal, for providing a first settable current at the collector of said one transistor; a second variable current source means, responsive to the control signal, for providing a second settable current at the emitters of said differential pair of transistors; control means for supplying the control signal to said first and second variable current source means; and means coupling the collector of said one transistor to the input node.
Claim 10
Dependent Claim 16 words
The apparatus of claim 6, further comprising: means for providing temperature compensation for said transistor means.
Claim 11
Dependent Claim 17 words
The apparatus of claim 6, further comprising: means for minimizing base current leakage through said transistor means.
Claim 12
Dependent Claim 17 words
The apparatus of claim 6, further comprising: means for biasing said transistor means within a operating range.
Claim 13
Dependent Claim 40 words
The apparatus of claim 6, wherein: said apparatus provides an output current proportional to the negative of the difference between the input voltage at the input node and the reference voltage, whereby the apparatus has a negative controllable effective resistance.
Claim 14
Dependent Claim 46 words
Apparatus for filtering a signal, comprising: (a) a frequency having a controllable filter response, including (i) a charge storage device, and (ii) a controllable effective resistance coupled to said charge storage device; and (b) means for controlling said controllable effective resistance to set the filter response.
Claim 15
Dependent Claim 46 words
Apparatus for filtering a signal, comprising: (a) a frequency having a controllable filter response, including (i) a charge storage device, and (ii) a controllable effective resistance coupled to said charge storage device; and (b) means for controlling said controllable effective resistance to set the filter response.
Claim 16
Dependent Claim 70 words
Apparatus, according to claim 11, wherein said controllable effective resistance comprises: (a) a pair of differential transistors, one of said transistors being base biased in response to a first voltage of said charge storage device, and the other of said transistors being base biased in response to a second reference voltage; and (b) at least one settable current source coupled to said pair of transistor and to said controlling means.
Claim 17
Dependent Claim 74 words
Apparatus for providing an output frequency signal in response to an input signal having a nominal data rate, comprising: (a) phase-locked loop means for generating the output frequency signal in response to a difference in phase between the output frequency signal and the input signal, including a controllable filter having a frequency response based on the nominal data rate of the input signal; and (b) control means for controlling said controllable filter frequency response.
Claim 18
Dependent Claim 74 words
Apparatus for providing an output frequency signal in response to an input signal having a nominal data rate, comprising: (a) phase-locked loop means for generating the output frequency signal in response to a difference in phase between the output frequency signal and the input signal, including a controllable filter having a frequency response based on the nominal data rate of the input signal; and (b) control means for controlling said controllable filter frequency response.
Claim 19
Dependent Claim 17 words
The apparatus of claim 13, wherein said controllable filter comprises an apparatus having a controllable effective resistance.
Claim 20
Dependent Claim 35 words
The apparatus of claim 14, wherein said apparatus having a controllable effective resistance comprises a settable current source and a transistor coupled to said settable current source, said controlling means setting said settable current source.
Claim 21
Dependent Claim 30 words
The apparatus of claim 13, wherein said control means generates a control signal having a value in dependence on the nominal data rate, the control signal controlling said controllable filter.

References Cited (Backward Citations)

US3739195A Cited
US3965441A Cited
US4433308A Cited
JPS58120314A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-08-25 1990-02-24 1990-08-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-08-25 1994-02-24 1994-08-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-08-25 1998-02-24 1998-08-26 $7700.00 Window Closed / Lapsed

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