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US4607378A Expired / Lapsed US ⏱️ 0.0 years remaining

Detector for detecting sync bits in a stream of data bits

Assignee: Honeywell Inc
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Filing: 1984-10-22
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Granted: 1986-08-19
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Expires: 2004-10-22
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Abstract

Abstract A detector for detecting a valid synchronizing pattern in a data frame in which a synchronizing bit pattern is multiplexed including a first register to receive the data and the synchronization bits, a pattern detector connected to the first register for detecting the synchronizing bit pattern in the first register, a second register, a source of clock pulses coupled to both said first and second registers, the elements of the second register being set to a first binary state and a density detector coupled to the second register. The clock source changes the states of successive elements of the second register from the first binary state to a second binary state as the data and synchronization bits are moved through the first register, the second register having inserted therein a signal of the first binary state upon the simultaneous detection of the synchronizing bit pattern and the conversion of a last element of said second register from a second binary state to a first binary state, and means responsive to the density detector detecting a predetermined number of elements of said second register in said first binary state to establish synchronization.

Inventors

  • 👤 Gary M. Catlin
  • 👤 Michael P. Healy

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 12:11
CPC Classifications
H; H04; H04L; H04L7/00; H04L7/04; H04L7/08; H04L7/041; H04L7/042

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 200 words
A detector for detecting a valid sychronizing pattern in a data frame in which a sychronizing bit pattern is multiplexed and thereby establishing synchronization; comprising in combination: a first register receiving data and synchronization bits of said data frame; a pattern detector coupled to said first register for detecting said synchronizing bit pattern in said first register; a second register; a source of clock pulses coupled to both said first and second registers; means for setting all elements of said second register to a first binary state; a density detector coupled to said second register; said clock source changing the states of successive elements of said second register from said first binary state to a second binary state as said data and synchronization bits are moved through said first register; means for inserting in said second register a signal of said first binary state upon the simultaneous detection of said synchronizing bit pattern and the conversion of a last element of said second register from a second binary state first to said first binary state; and means responsive to said density detector detecting a predetermined number of elements of said second register in said first binary state to establish synchronization.
Claim 2
Dependent Claim 200 words
A detector for detecting a valid sychronizing pattern in a data frame in which a sychronizing bit pattern is multiplexed and thereby establishing synchronization; comprising in combination: a first register receiving data and synchronization bits of said data frame; a pattern detector coupled to said first register for detecting said synchronizing bit pattern in said first register; a second register; a source of clock pulses coupled to both said first and second registers; means for setting all elements of said second register to a first binary state; a density detector coupled to said second register; said clock source changing the states of successive elements of said second register from said first binary state to a second binary state as said data and synchronization bits are moved through said first register; means for inserting in said second register a signal of said first binary state upon the simultaneous detection of said synchronizing bit pattern and the conversion of a last element of said second register from a second binary state first to said first binary state; and means responsive to said density detector detecting a predetermined number of elements of said second register in said first binary state to establish synchronization.
Claim 3
Dependent Claim 45 words
A detector for detecting a valid synchronizing pattern in a data frame in which a synchronizing bit pattern is multiplexed and thereby establishing synchronization as in claim 1 wherein said first register and said second register are each equal in length to the data frame.

References Cited (Backward Citations)

US3586776A Cited
US3766316A Cited
US4450558A Cited
US4404675A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-08-18 1990-02-17 1990-08-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-08-18 1994-02-17 1994-08-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-08-18 1998-02-17 1998-08-19 $7700.00 Window Closed / Lapsed

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