US4607351A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Cartridge memory protection
Assignee: International Business Machines Corp
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Filing: 1985-01-14
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Granted: 1986-08-19
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Expires: 2005-01-14
Abstract
Abstract Cartridge (1) contains memory (40a-40h) and a back-up battery (13). Terminals (5a-5i) of the cartridge (1) plug into termnals (7a-7i) of a host machine (3). Positive deactivation of the write control is achieved by both the base and emitter of a bipolar transistor (52) being deactivated when the cartridge (1) is unplugged. Battery voltage then appears at read/write control line (64) through resistor (56) connected to the collector of the transistor (52). This brings the control line (64) to the read status and positively protects data in memory (40a-40h) against transient signals, which may occur especially during plug in when the host (3) is activated, or from electrostatic charges.
Inventors
- 👤 Jeri L. Gerber
- 👤 Jorge L. Nazario
- 👤 Victor M. Simi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 02:31
CPC Classifications
G; G11; G11C; G11C5/00; G11C5/14; G11C5/141; G11C7/00; G11C7/24
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
128 words
A memory unit having a battery and at least one memory element connected to be powered by said battery, said memory element having one control line activating said memory element for reading at a first voltage level and for writing at a second voltage level, a bipolar transistor in said memory unit connected with said battery in the collector-to-emitter circuit of said transistor, a first terminal for connection to a host machine connected to the base of said transistor and a second terminal for connection to said host machine connected to the emitter of said transistor, and means connecting the collector of said bipolar transistor to said one control line to provide said first voltage level when no current flows between said first terminal and said second terminal.
Claim 2
Dependent Claim
128 words
A memory unit having a battery and at least one memory element connected to be powered by said battery, said memory element having one control line activating said memory element for reading at a first voltage level and for writing at a second voltage level, a bipolar transistor in said memory unit connected with said battery in the collector-to-emitter circuit of said transistor, a first terminal for connection to a host machine connected to the base of said transistor and a second terminal for connection to said host machine connected to the emitter of said transistor, and means connecting the collector of said bipolar transistor to said one control line to provide said first voltage level when no current flows between said first terminal and said second terminal.
Claim 3
Dependent Claim
77 words
The memory unit as in claim 1 also comprising a chip select circuit to select a memory element in said unit from signals applied to said unit and having a control input for deactivating said chip select circuit when said control input is at a predetermined voltage level and means connecting said battery to said control input to apply said predetermined voltage level to said control input when said unit is not connected to said host machine.
Claim 4
Dependent Claim
199 words
A cartridge containing an electronic, digital memory, a voltage source, and a set of terminals to be plugged into terminals of a host machine, said memory having a read control input effective to condition said memory to read data from said memory when said read control input is at a first voltage level, an active element having a first side and a second side and two control terminals connected together to control said active element to a conductive status and a non-conductive status between said first side and said second side, means connecting said voltage source to one of said first side and said second side, and means connecting said read control input to one of said first side and said second side, the level of said voltage source and the location of said connections of said voltage source and said read control input providing said first voltage level to said read control input from said voltage source when said active element is controlled to said non-conductive status by said control terminals not being in a completed circuit and providing a second voltage level to said read control input when said active element is controlled to said conductive status.
Claim 5
Dependent Claim
199 words
A cartridge containing an electronic, digital memory, a voltage source, and a set of terminals to be plugged into terminals of a host machine, said memory having a read control input effective to condition said memory to read data from said memory when said read control input is at a first voltage level, an active element having a first side and a second side and two control terminals connected together to control said active element to a conductive status and a non-conductive status between said first side and said second side, means connecting said voltage source to one of said first side and said second side, and means connecting said read control input to one of said first side and said second side, the level of said voltage source and the location of said connections of said voltage source and said read control input providing said first voltage level to said read control input from said voltage source when said active element is controlled to said non-conductive status by said control terminals not being in a completed circuit and providing a second voltage level to said read control input when said active element is controlled to said conductive status.
Claim 6
Dependent Claim
60 words
The cartridge as in claim 3 in which said active element is a bipolar transistor, said first side is the collector of said transistor, said second side is the emitter of said transistor, and said control terminals are the base of said transistor and said emitter, and in which said voltage source is connected through a resistor to said collector.
Claim 7
Dependent Claim
77 words
The cartridge as in claim 4 also comprising a chip select circuit to select a memory chip in said cartridge from signals applied to said cartridge and having a control input for deactivating said chip select circuit when said control input is at a predetermined voltage level and means connecting said voltage source to said control input to apply said predetermined voltage level to said control input when said cartridge is not connected to said host machine.
Claim 8
Dependent Claim
77 words
The cartridge as in claim 3 also comprising a chip select circuit to select a memory chip in said cartridge from signals applied to said cartridge and having a control input for deactivating said chip select circuit when said control input is at a predetermined voltage level and means connecting said voltage source to said control input to apply said predetermined voltage level to said control input when said cartridge is not connected to said host machine.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-08-18 | 1990-02-17 | 1990-08-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-08-18 | 1994-02-17 | 1994-08-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-08-18 | 1998-02-17 | 1998-08-19 | $7700.00 | Window Closed / Lapsed |