Video pattern noise processor

Claim 2

A pattern noise processor for cancelling pattern noise in a video signal from a charge-injection device, said charge-injection device being of a type which simultaneously reads out first and second signals, said first and second signals respectively containing contents of corresponding charge storage locations in first and second rows of said charge-injection device, said charge storage locations in said first row containing said video signal and pattern noise, and said charge storage locations in said second row containing only pattern noise, having had any video therein erased comprising: means for delaying one of said first and second signals for a predetermined time, said predetermined time being sufficient to coincide portions of said one of said first and second signals with portions of the other of said first and second signals originating in the same storage locations of the same row; means for differencing the delayed and undelayed signals to produce a noise-reduced signal; means for removing a high-frequency component of said noise-reduced signal above a predetermined frequency to produce a noise-reduced, low-frequency component; means for passing a high-frequency component of at least said first signal, said high-frequency component including all frequencies above said predetermined frequency; means for clipping portions of said high-frequency component having positive and negative amplitudes less than a predetermined value to produce a clipped high-frequency component; means for delaying said high-frequency component for said predetermined time to produce a clipped delayed high-frequency component; and means for adding said clipped high-frequency component and said noise-reduced, low-frequency component.

Claim 3

A pattern noise processor according to claim 1 wherein said one of said first and second signals is said first signal and said predetermined time is a horizontal interval.

Claim 4

A pattern noise processor according to claim 2 wherein said means for removing a high-frequency component includes first and second low-pass filters, said first and second low-pass filters being disposed upstream of said means for differencing.

Claim 5

A pattern noise processor according to claim 1 wherein said means for differencing includes a subtractor having a plus input and a minus input, said first signal being connected to said plus input and said second signal being connected to said minus input.

Claim 6

A pattern noise processor according to claim 1 wherein said means for passing a high-frequency component includes a high-pass filter.

Claim 7

A pattern noise processor according to claim 1 wherein said means for passing includes: means for differencing said first signal and said second signal to produce a noise-reduced signal; and a high-pass filter effective to pass substantially all frequencies in said noise-reduced signal higher than said predetermined frequency and to block substantially all frequencies below said predetermined frequency.

Claim 8

A pattern noise processor according to claim 1 wherein said means for delaying said high-frequency component includes means for adding said high-frequency component to said first signal before delaying said first signal in said means for delaying one of said first and second signals, and a signal delay device effective to delay both said high-frequency component and said first signal, said means for differencing said delayed and undelayed signals being disposed downstream of said single delay device.

Claim 9

A pattern noise processor for cancelling pattern noise in a video signal from a charge-injection device, said charge-injection device being of a type which simultaneously reads out first and second signals, said first and second signals respectively containing contents of corresponding charge storage locations in first and second rows of said charge-injection device, said charge storage locations in said first row containing said video signal and pattern noise, and said charge storage locations in said second row containing only pattern noise, having had any video therein erased comprising: first low-pass means for passing a first frequency range of said first signal, said first frequency range including substantially all frequencies below a predetermined frequency, and for blocking substantially all frequencies above said predetermined frequency to produce a first low-frequency component; second low-pass means for passing said first frequency range of said second signal to produce a second low-frequency component; means for delaying one of said first and second low-frequency components for a predetermined time, said predetermined time being sufficient to coincide portions of said one of said first and second low-frequency components with portions of the other of said first and second low-frequency components originating in the same storage locations of the same row; means for subtracting the delayed and undelayed low-frequency components to produce a substantially pure low-frequency video component from which low-frequency components of said pattern noise are cancelled; high-pass means for passing all frequencies in at least said first signal higher than said predetermined frequency to produce a high-frequency component; means for clipping all portions of said high-frequency component having an amplitude lower than a predetermined positive and negative amplitude to produce a clipped high-frequency component; means for delaying said clipped high-frequency component for said predetermined time; and means for adding the delayed clipped high-frequency component to said substantially pure low-frequency video component to produce a full-frequency video signal from which both low-frequency and high-frequency pattern noise are substantially eliminated.

Claim 10

A pattern noise processor for cancelling pattern noise in a video signal from a charge-injection device, said charge-injection device being of a type which simultaneously reads out first and second signals, said first and second signals respectively containing contents of corresponding charge storage locations in first and second rows of said charge-injection device, said charge storage locations in said first row containing said video signal and pattern noise, and said charge storage locations in said second row containing only pattern noise, having had any video therein erased comprising: first low-pass means for passing a first frequency range of said first signal, said first frequency range including substantially all frequencies below a predetermined frequency, and for blocking substantially all frequencies above said predetermined frequency to produce a first low-frequency component; second low-pass means for passing said first frequency range of said second signal to produce a second low-frequency component; means for delaying one of said first and second low-frequency components for a predetermined time, said predetermined time being sufficient to coincide portions of said one of said first and second low-frequency components with portions of the other of said first and second low-frequency components originating in the same storage locations of the same row; means for subtracting the delayed and undelayed low-frequency components to produce a substantially pure low-frequency video component from which low-frequency components of said pattern noise are cancelled; high-pass means for passing all frequencies in at least said first signal higher than said predetermined frequency to produce a high-frequency component; means for clipping all portions of said high-frequency component having an amplitude lower than a predetermined positive and negative amplitude to produce a clipped high-frequency component; means for delaying said clipped high-frequency component for said predetermined time; and means for adding the delayed clipped high-frequency component to said substantially pure low-frequency video component to produce a full-frequency video signal from which both low-frequency and high-frequency pattern noise are substantially eliminated.

Claim 11

A pattern noise processor according to claim 8 wherein said means for delaying said clipped high-frequency component is separate from said means for delaying one of said first and second low-frequency components.

Claim 12

A pattern noise processor according to claim 8 wherein said means for delaying said clipped high-frequency component is the same as said means for delaying one of said first and second low-frequency components.

Claim 13

A pattern noise processor according to claim 8 wherein said first and second low-pass means are disposed upstream of said means for subtracting the delayed and undelayed low-frequency components.

Claim 14

A pattern noise processor according to claim 8 wherein said first and second low-pass means includes a single low-pass filter disposed downstream of said means for subtracting the delayed and undelayed low-frequency components.

Claim 15

A pattern noise processor according to claim 12 wherein said high-pass means is disposed downstream of said means for subtracting the delayed and undelayed low-frequency components.