Voice and data interface circuit

Claim 2

An interface circuit comprising: (a) means for receiving a first and a second signal having two different frequencies from a line, the line having a first nominal line impedance to the first signal and a second nominal line impedance to the second signal which is less than the first nominal line impedance, said receiving means having an input impedance intermediate said first and second line impedances, and (b) means for applying a representation of the first signal in aiding phase with the first signal and a representation of the second signal in opposing phase to the second signal, to the line whereby the input impedance is raised to at least approximately match the first nominal line impedance with respect to the first signal and lowered to at least approximately match the second nominal line impedance with respect to the second signal.

Claim 3

A voice and data interface circuit comprising: (a) means for receiving an analog signal and a digital signal from a bidirectional balanced line, said line having a first nominal line impedance with respect to the analog signal and a second nominal line impedance with respect to the digital signal, the first nominal line impedance being greater than the second nominal line impedance, (b) first transmitting means connected to said receiving means for transmitting at least the digital signal to a first unbalanced line, (c) means for applying DC line current to said balanced line comprising feed resistor means for providing a low resistance path for said DC current to said balanced line, said resistor means providing an input impedance to said circuit which is lower than the first nominal line impedance and higher than the second nominal line impedance, (d) attenuator means connected to said receiving means and the first transmitting means for attenuating and inverting said received digital signal and for passing said received analog signal, (e) second transmitting means connected to the attenuator means for transmitting said passed analog signal to a second bidirectional unbalanced line having a third nominal line impedance, and (f) feedback means connected to the attenuator means for applying said received analog signal in aiding phase and said attenuated and inverted digital signal in opposing phase respectively to said analog and digital signals on said balanced line through said resistor means, whereby the input impedance is raised to approximately match the first nominal line impedance with respect to the analog signal and lowered to approximately match the second nominal line impedance with respect to the digital signal.

Claim 4

A voice and data interface circuit comprising: (a) means for receiving an analog signal and a digital signal from a bidirectional balanced line, said line having a first nominal line impedance with respect to the analog signal and a second nominal line impedance with respect to the digital signal, the first nominal line impedance being greater than the second nominal line impedance, (b) first transmitting means connected to said receiving means for transmitting at least the digital signal to a first unbalanced line, (c) means for applying DC line current to said balanced line comprising feed resistor means for providing a low resistance path for said DC current to said balanced line, said resistor means providing an input impedance to said circuit which is lower than the first nominal line impedance and higher than the second nominal line impedance, (d) attenuator means connected to said receiving means and the first transmitting means for attenuating and inverting said received digital signal and for passing said received analog signal, (e) second transmitting means connected to the attenuator means for transmitting said passed analog signal to a second bidirectional unbalanced line having a third nominal line impedance, and (f) feedback means connected to the attenuator means for applying said received analog signal in aiding phase and said attenuated and inverted digital signal in opposing phase respectively to said analog and digital signals on said balanced line through said resistor means, whereby the input impedance is raised to approximately match the first nominal line impedance with respect to the analog signal and lowered to approximately match the second nominal line impedance with respect to the digital signal.

Claim 5

A voice and data interface circuit as defined in claim 2, wherein the means for receiving further includes means for amplifying said digital and analog signals.

Claim 6

A voice and data interface circuit as defined in claim 2, wherein the attenuator means further includes a low-pass filter for substantially attenuating and inverting the digital signal and for passing the analog signal, and the second transmitting means further includes an impedance matching resistor connected between said unbalanced bidirectional line and the low pass filter for matching the third nominal line impedance.

Claim 7

A voice and data interface circuit as defined in claim 3 or 4, wherein the means for amplifying is a differential amplifier having a first gain fon the analog signal and a second gain for the digital signal, the first gain being less than the second gain.

Claim 8

A voice and data interface circuit as defined in claim 3 or 4, wherein the feedback means is adapted to adjust the gain of said amplifying means whereby said raised input impedance with respect to the analog signal decreases the gain of said amplifying means with respect to the analog signal, and said lowered input impedance with respect to the digital signal increases the gain of said amplifying means with respect to the digital signal.

Claim 9

A voice and data interface circuit comprising: (a) tip and ring terminals for connection to a bidirectional balanced lead pair having a first nominal line impedance with respect to a first analog signal having a predetermined bandwidth and a second nominal line impedance with respect to a carrier signal, the first nominal line impedance being greater than the second nominal line impedance, the carrier signal having a substantially higher frequency than the highest frequency in said bandwidth, (b) feed resistor means connected to the tip and ring terminals for providing a low resistance path for DC line current to said balanced lead pair, said resistor means impressing an impedance across the tip and ring terminals which is lower than the first nominal line impedance and higher than the second nominal line impedance, (c) receiving means connected to the tip and ring terminals for receiving the first analog signal and a first digital signal from said balanced lead pair, said digital signal being an amplitude modulated form of the carrier signal, (d) a data output terminal connected to the receiving means for transmission of at least the first digital signal to an unbalanced data output lead connected to a PABX or central office, (e) attenuator means connected to the receiving means for passing said first received analog signal while inverting and substantially attenuating said first received digital signal, (f) a junctor terminal connected to the attenuator means for transmitting said first passed analog signal to an unbalanced bidirectional lead connected to the PABX or central office, and for receiving a second analog signal therefrom, (g) a data input terminal connected to the attenuator means for receiving a second digital signal from an unbalanced data input lead connected to the PABX or central office, (h) feedback means for applying said first passed analog signal and said inverted and substantially attenuated first digital signal to a combining means, said combining means having an output of combined signals, said first passed signal having a first predetermined amplitude and said inverted and attenuated first digital signal having a second predetermined amplitude which is less than the first predetermined amplitude, and for applying said combined signal to the tip and ring terminals such that said first passed analog signal is applied in aiding phase and said attenuated first digital signal is applied in opposing phase to said first signals on said balanced lead pair, whereby the impedance across the tip and ring terminals is raised to approximately match the first nominal line impedance with respect to the first analog signal and lowered to approximately match the second nominal line impedance with respect to the carrier signal, (i) said combining means being connected to said unbalanced bidirectional and data input terminals for combining and applying said second received analog and digital signals to the tip and ring terminals through the feed resistor means, and (j) cancelling means connected to the combining means for preventing said combined signals from being applied to the means for receiving.

Claim 10

A voice and data interface circuit comprising: (a) tip and ring terminals for connection to a bidirectional balanced lead pair having a first nominal line impedance with respect to a first analog signal having a predetermined bandwidth and a second nominal line impedance with respect to a carrier signal, the first nominal line impedance being greater than the second nominal line impedance, the carrier signal having a substantially higher frequency than the highest frequency in said bandwidth, (b) feed resistor means connected to the tip and ring terminals for providing a low resistance path for DC line current to said balanced lead pair, said resistor means impressing an impedance across the tip and ring terminals which is lower than the first nominal line impedance and higher than the second nominal line impedance, (c) receiving means connected to the tip and ring terminals for receiving the first analog signal and a first digital signal from said balanced lead pair, said digital signal being an amplitude modulated form of the carrier signal, (d) a data output terminal connected to the receiving means for transmission of at least the first digital signal to an unbalanced data output lead connected to a PABX or central office, (e) attenuator means connected to the receiving means for passing said first received analog signal while inverting and substantially attenuating said first received digital signal, (f) a junctor terminal connected to the attenuator means for transmitting said first passed analog signal to an unbalanced bidirectional lead connected to the PABX or central office, and for receiving a second analog signal therefrom, (g) a data input terminal connected to the attenuator means for receiving a second digital signal from an unbalanced data input lead connected to the PABX or central office, (h) feedback means for applying said first passed analog signal and said inverted and substantially attenuated first digital signal to a combining means, said combining means having an output of combined signals, said first passed signal having a first predetermined amplitude and said inverted and attenuated first digital signal having a second predetermined amplitude which is less than the first predetermined amplitude, and for applying said combined signal to the tip and ring terminals such that said first passed analog signal is applied in aiding phase and said attenuated first digital signal is applied in opposing phase to said first signals on said balanced lead pair, whereby the impedance across the tip and ring terminals is raised to approximately match the first nominal line impedance with respect to the first analog signal and lowered to approximately match the second nominal line impedance with respect to the carrier signal, (i) said combining means being connected to said unbalanced bidirectional and data input terminals for combining and applying said second received analog and digital signals to the tip and ring terminals through the feed resistor means, and (j) cancelling means connected to the combining means for preventing said combined signals from being applied to the means for receiving.

Claim 11

A voice and data interface circuit as defined in claim 7, wherein the means for receiving includes means for amplifying said digital and analog signals, said tip and ring terminals being connected to first and second inputs of said amplifying means through high valued balancing input resistors of approximately equal resistance.

Claim 12

A voice and data interface circuit as defined in claim 7, wherein said means for combining and applying is a summing amplifier means, the output of which is connected to the feed resistor means, and a first input of which is connected to an output of the attenuator means, and a second input of which is connected in a circuit to the junctor terminal and to the data input terminal.

Claim 13

A voice and data interface circuit as defined in claim 8 or 9, wherein the means for amplifying is a differential amplifier having a first gain for the first analog signal and a second gain for the first digital signal, the first gain being less than the second gain.

Claim 14

A voice and data interface circuit as defined in claim 8 or 9, wherein the feedback means is adapted to adjust the gain of said amplifying means whereby said raised impedance across the tip and ring terminals for the first analog signal decreases the gain of said amplifying means with respect to the first analog signal, and said lowered impedance across the tip and ring terminals for the first digital signal increases the gain of said amplifying means with respect to the first digital signal.

Claim 15

A voice and data interface circuit as defined in claim 8 or 9, wherein the cancelling means is a circuit path from the output of the summing amplifier means to one of the first and second inputs of said amplifying means through a third resistance having the same value of resistance as either of said balancing input resistors, the other input being connected to the output of the summing amplifier means through the feed resistor means, whereby signals appearing at the output of the summing amplifier means are cancelled in said amplifying means.

Claim 16

A voice and data interface circuit as defined in claims 7, 8 or 9 wherein said analog signals are audio signals, said carrier signal frequency is approximately 32 KHz, said carrier signal is preferably 100% amplitude modulated, and said low passfilter has a cut-off frequency of approximately 8 KHz.

Claim 21

A method as defined in claim 15, in which the nominal input impedance is substantially defined by providing a DC current path having said input impedance to said line.