Sorting apparatus

Claim 1

In a digital computer wherein a randomly arranged set of n digital numbers is to be converted to a set of n digital numbers, where n is greater than two, in and ordered sequence after (2n-1) clock pulses, the improvement comprising: (a) n registers for storing n digital numbers, the digital numbers initially stored in such registers being randomly arranged; (b) comparator means, switchably disposed between adjacent first pairs of registers upon the occurrence of odd numbered ones of the (2n-1) clock pulses, for testing the digital numbers initially stored in each such first pair of registers to determine whether or not the digital numbers stored in each first pair are in the ordered sequence and to produce first control signals indicative of the result of comparison of the digital numbers; (c) transfer means, responsive to first control signals indicating that the digital numbers stored in any first pair of registers are not in the ordered sequence, for then interchanging the digital numbers in any such first pair; and (d) means, responsive upon occurrence of even numbered ones of the (2n-1) clock pulses, for switching each comparator means to a second pair of adjacent registers, each one of such second pair including one of the registers in a corresponding first pair and not the first or the last ones of the registers, to produce second control signals for the transfer means whereby, after the occurrence of, at the most, (2n-1) clock pulses, the digital numbers stored in the registers are in the ordered sequence.