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US4603473A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabricating integrated semiconductor circuit

Assignee: Pioneer Corp
•
Filing: 1983-10-12
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Granted: 1986-08-05
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Expires: 2003-10-12
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Abstract

Abstract A method of fabricating an integrated semiconductor circuit device having a plurality of layers of circuit patterns, comprising forming the circuit pattern of at least one of the above mentioned layers by a direct exposure method using an electron beam, and forming the circuit pattern of at least one of the remaining layers by a light exposure method using a photomask.

Inventors

  • 👤 Takashi Suemitsu
  • 👤 Takashi Niriki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 02:26
CPC Classifications
G; G03; G03F; G03F9/00; G03F9/70; G03F9/7073; G03F9/7076; G03F7/00; G03F7/70; G03F7/70425; G03F7/7045; H; H10; H10P; H10P76/00; H10P76/20; H10P76/204; H10P76/2045; H10P95/00; H10W; H10W46/00; H10W46/201; H10W46/501; H10W46/507; Y; Y10; Y10S; Y10S438/00; Y10S438/942; Y10S438/948; Y10S438/949; Y10S438/975

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 75 words
A method of fabricating an integrated semiconductor circuit device having a plurality of layers of circuit patterns, comprising forming the circut pattern of at least one of said layers and at least one target mark for a photomask by a direct exposure method using an electron beam, and forming the circuit pattern of at least one of the remaining layers by a light exposure method using the photomask positioned by means of said target mark.
Claim 2
Independent Claim 75 words
A method of fabricating an integrated semiconductor circuit device having a plurality of layers of circuit patterns, comprising forming the circut pattern of at least one of said layers and at least one target mark for a photomask by a direct exposure method using an electron beam, and forming the circuit pattern of at least one of the remaining layers by a light exposure method using the photomask positioned by means of said target mark.
Claim 3
Independent Claim 111 words
A method of fabricating an integrated semiconductor circuit device, comprising forming at least one registration mark on a semiconductor wafer, forming a first layer of a circuit pattern on a semiconductor wafer and at least one target mark for a photomask by irradiating the semiconductor wafer with an electron beam by using said registration mark as a reference for locating the circuit pattern correctly on the semiconductor wafer, forming at least one additional semiconductor layer on said wafer, and irradiating said additional semiconductor layer with light through the photomask positioned on the wafer by using said target mark as a reference for correctly positioning the photomask with respect to the wafer.
Claim 4
Independent Claim 111 words
A method of fabricating an integrated semiconductor circuit device, comprising forming at least one registration mark on a semiconductor wafer, forming a first layer of a circuit pattern on a semiconductor wafer and at least one target mark for a photomask by irradiating the semiconductor wafer with an electron beam by using said registration mark as a reference for locating the circuit pattern correctly on the semiconductor wafer, forming at least one additional semiconductor layer on said wafer, and irradiating said additional semiconductor layer with light through the photomask positioned on the wafer by using said target mark as a reference for correctly positioning the photomask with respect to the wafer.
Claim 5
Independent Claim 165 words
A method of fabricating an integrated semiconductor circuit device, comprising preparing a photomask which is preliminarily provided with a pattern representative of at least one registration mark to be formed on said semiconductor wafer. forming at least one target mark on a semiconductor wafer by irradiating the semiconductor wafer with an electron beam, forming a first layer of a circuit pattern and at least one registration mark on a semiconductor wafer by irradiating the semiconductor wafer with light through a photomask positioned on the wafer by using said target mark as a reference for correctly positioning the photomask with respect to the wafer, forming at least one additional semiconductor layer on said wafer, irradiating said additional semiconductor layer with an electron beam by using said registration mark as a reference for locating the circuit pattern correctly on the semiconductor wafer, and preparing a photomask which is preliminarily provided with a pattern representative of at least one registration mark to be formed on said semiconductor wafer.
Claim 6
Independent Claim 165 words
A method of fabricating an integrated semiconductor circuit device, comprising preparing a photomask which is preliminarily provided with a pattern representative of at least one registration mark to be formed on said semiconductor wafer. forming at least one target mark on a semiconductor wafer by irradiating the semiconductor wafer with an electron beam, forming a first layer of a circuit pattern and at least one registration mark on a semiconductor wafer by irradiating the semiconductor wafer with light through a photomask positioned on the wafer by using said target mark as a reference for correctly positioning the photomask with respect to the wafer, forming at least one additional semiconductor layer on said wafer, irradiating said additional semiconductor layer with an electron beam by using said registration mark as a reference for locating the circuit pattern correctly on the semiconductor wafer, and preparing a photomask which is preliminarily provided with a pattern representative of at least one registration mark to be formed on said semiconductor wafer.
Claim 7
Dependent Claim 28 words
A method as set forth in claim 2, in which said registration mark on the semiconductor wafer is formed by irradiating the semiconductor wafer with an electron beam.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-08-04 1990-02-03 1990-08-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-08-04 1994-02-03 1994-08-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-08-04 1998-02-03 1998-08-05 $7700.00 Window Closed / Lapsed

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