Onboard clock correction by means of drift prediction

Claim 2

In a method of operating a clock system, said method of the type comprising the steps of transmitting metering bursts to a satellite, determining an amount of phase error in an onboard clock of said satellite in response to re-transmitted bursts received from said satellite, and generating and transmitting to said satellite an error correction value for correcting said error in said onboard clock relative to said metering bursts, the improvement characterised in that said generating step comprises the steps of: curve-fitting said determined phase errors in accordance with a polynomial function having coefficient values including adjusting said coefficient values in order to minimize an error between said determined phase errors and phase errors predicted in accordance with said polynomial function; predicting an amount of clock drift in accordance with said polynomial function; and calculating said error correction value in accordance with said predicted amount of drift.

Claim 3

A method as defined in claim 1, wherein said step of determining an amount of phase error comprises determining said phase error over an interval [t 0 , t n ] by sampling said phase error at sampling intervals of T 0 , where t n =t 0 +T, T=nT 0 , and n is an integer, said step of predicting said clock drift comprises predicting said clock drift for a succeeding interval [t n , t n+m ], where m is an integer, and said step of calculating said error correction value comprises calculating a first correction value w for correcting said determined phase error and an incremental correction value Δw for correcting said predicted clock drift, and then calculating said error correction value w' substantially defined by w'=w+Δw.

Claim 4

A method as defined in claim 2, wherein said incremental correction value w is substantially defined by: ##EQU15## where, y(t n ) is the phase error at time t n , k is an integer, and a i , 0≦i≦k are said coefficients.

Claim 5

A method as defined in claim 1, wherein said step of determining an amount of phase error comprises sampling said phase error at intervals of T 0 , said polynomial function is given by: ##EQU16## where, y a (t) is an approximation of the cumulative phase error over an interval [t 0 , t n ] during which said phase error is sampled, a 0 is one of said coefficients, k is an integer, and a i , 0≦i≦k, are the remainder of said coefficients.

Claim 6

A method as defined in claim 4, wherein said step of determining an amount of phase error comprises determining said phase error over an interval [t 0 , t n ] by sampling said phase error at sampling intervals of T 0 , where t n =t 0 +T, T=nT 0 , and n is an integer, said step of predicting said clock drift comprising predicting said clock drift for a succeeding interval [t n , t n +m], where m is an integer, and said step of calculating said error correction value comprises calculating a first correction value w for correcting said determined phase error and an incremental correction value Δw for correcting said predicted clock drift, and then calculating said error correction value w' substantially defined by w'=w+Δw.

Claim 7

A method as defined in claim 5, wherein said incremental correction value w is substantially defined by: ##EQU17## where y(t n ) is the phase error at time t n .

Claim 8

A method as defined in claim 1, further comprising detecting when an excessive phase error has occurred and transmitting an error correction value to said satellite in response to a detected excessive phase error.

Claim 9

A satellite clock system of the type comprising means for transmitting metering bursts to a satellite; means for determining an amount of phase error in an onboard clock of said satellite in response to re-transmitted bursts received from said satellite, and error correction means for generating and transmitting to said satellite an error correction value for correcting said error in said onboard clock relative to said metering bursts, the improvement characterized in that said error correction means comprises: clock correction algorithm processing means for curve-fitting said determined phase errors according to a polynomial function having coefficients, said algorithm processing means adjusting the values of said coefficients in order to minimize an error between said determined phase errors and results of said polynomial function, determining a predicted clock drift in accordance with said polynomial function and calculating said error correction value in accordance with said predicted clock drift.

Claim 10

A satellite clock system of the type comprising means for transmitting metering bursts to a satellite; means for determining an amount of phase error in an onboard clock of said satellite in response to re-transmitted bursts received from said satellite, and error correction means for generating and transmitting to said satellite an error correction value for correcting said error in said onboard clock relative to said metering bursts, the improvement characterized in that said error correction means comprises: clock correction algorithm processing means for curve-fitting said determined phase errors according to a polynomial function having coefficients, said algorithm processing means adjusting the values of said coefficients in order to minimize an error between said determined phase errors and results of said polynomial function, determining a predicted clock drift in accordance with said polynomial function and calculating said error correction value in accordance with said predicted clock drift.

Claim 11

A satellite clock system as defined in claim 8, wherein said means for determining an amount of phase error determines said phase error over an interval [t 0 , t n ] by sampling said phase error at sampling intervals of T 0 , where t n =t 0 +T,T=nT 0 , and n is an integer, said predicted clock drift is determined for a succeeding interval [t n , t n +m], where m is an integer, and said error correction value is calculated by calculating a first correction value w for correcting said determined phase error and an incremental correction value Δw for correcting said predicted clock drift, and then calculating said error correction value w' substantially defined by w'=w+Δw.

Claim 12

A satellite clock system as defined in claim 9, wherein said incremental correction value Δw is substantially defined by: ##EQU18## where, y(t n ) is the phase error at time t n , k is an integer, and a i , 0≦i≦k are said coefficients.

Claim 13

A satellite clock system as defined in claim 8, wherein said means for determining an amount of phase error samples said phase error at intervals of T 0 , said polynomial function being defined by: ##EQU19## where, y a (t) is an approximation of the cumulative phase error over an interval [t 0 , t n ] during which phase error is sampled, a 0 is one of said coefficients, k is an integer, and a i , 0≦i≦k , are the remainder of said coefficients.

Claim 14

A satellite clock system as defined in claim 11, wherein said means for determining an amount of phase error determines said phase error over an interval [t 0 , t n ] by sampling said phase error at sampling intervals of T 0 , where t n =t 0 +T,T=nT 0 , and n is an integer, said predicted clock drift is determined for a succeeding interval [t n , t n +m], where m is an integer, and said error correction value is calculated by calculating a first correction value w for correcting said determined phase error and an incremental correction value Δw for correcting said predicted clock drift, and then calculating said error correction value w' substantially defined by w'=w+Δw.

Claim 15

A satellite clock system as defined in claim 12, wherein said incremental correction value Δw is substantially defined by: ##EQU20## where y(t n ) is the phase error at time t n .

Claim 16

A satellite clock system as defined in claim 8, wherein the improvement is further characterized in that said error correction means detects when an excessive phase error has occurred and transmits an error correction value to said satellite in response to a detected excessive phase error.