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US4600889A Expired / Lapsed US ⏱️ 0.0 years remaining

Coherent oscillator

Assignee: General Dynamics Mission Systems Inc
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Filing: 1985-03-13
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Granted: 1986-07-15
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Expires: 2005-03-13
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Abstract

Abstract A coherent oscillator circuit which samples a signal responsive to phase and frequency of a transmitted pulse of radio frequency energy in an acquisition mode, and regenerates a signal corresponding to the sampled phase and frequency in a save mode is disclosed. A storage element performs the sampling in a relative fast, open loop manner during the acquiring mode. Then, during the save mode a phase locked loop forms which locks when a loop oscillator outputs a signal which corresponds to the sampled signal. The coherent oscillator forms a portion of a demodulator for a coherent-on-receive radar.

Inventors

  • 👤 Thomas W. Rugen

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 18:39
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/14; G; G01; G01S; G01S7/00; G01S7/02; G01S7/28; G01S7/285; G01S7/288

Claims Analysis

Total Claims: 23
Claim 1
Independent Claim 178 words
A coherent oscillator circuit for regenerating the phase and frequency of a master signal in a coherent oscillator output signal, said circuit comprising: a switch having a first signal input adapted to receive the master signal, a second signal input, and an output; a reference oscillator having an output for providing a reference signal; a phase detector having a first input coupled to the output of said switch, a second input coupled to the output of said reference oscillator, and an output; a storage element having a signal input coupled to the output of said phase detector and an output for providing a sampled phase signal; a subtractor having a first input coupled to the output of said phase detector, a second input coupled to the output of said storage element, and having an output; and a variable frequency oscillator having a control input coupled to the output of said subtractor and an output coupled to the second signal input of said switch, the output of said variable frequency oscillator being for supplying the coherent oscillator output signal.
Claim 2
Dependent Claim 178 words
A coherent oscillator circuit for regenerating the phase and frequency of a master signal in a coherent oscillator output signal, said circuit comprising: a switch having a first signal input adapted to receive the master signal, a second signal input, and an output; a reference oscillator having an output for providing a reference signal; a phase detector having a first input coupled to the output of said switch, a second input coupled to the output of said reference oscillator, and an output; a storage element having a signal input coupled to the output of said phase detector and an output for providing a sampled phase signal; a subtractor having a first input coupled to the output of said phase detector, a second input coupled to the output of said storage element, and having an output; and a variable frequency oscillator having a control input coupled to the output of said subtractor and an output coupled to the second signal input of said switch, the output of said variable frequency oscillator being for supplying the coherent oscillator output signal.
Claim 3
Dependent Claim 104 words
A coherent oscillator circuit as claimed in claim 1 wherein: said switch additionally comprises a control input for controlling the operation of said switch, said switch control input being configured so that said switch connects the first signal input to the output of said switch in a first mode and the second signal input to the output of said switch in a second mode; and said storage element additionally comprises a control input for controlling the operation of said storage element, said storage element control input being configured so that said storage element samples during the first mode and saves during the second mode.
Claim 4
Dependent Claim 38 words
A coherent oscillator circuit as claimed in claim 1 additionally comprising a low pass filter having an input coupled to the output of said subtractor and an output coupled to the control input of said variable frequency oscillator.
Claim 5
Dependent Claim 19 words
A coherent oscillator circuit as claimed in claim 1 wherein said storage element comprises a sample and hold amplifier.
Claim 6
Dependent Claim 16 words
A coherent oscillator circuit as claimed in claim 1 wherein said subtractor comprises a differential amplifier.
Claim 7
Dependent Claim 162 words
A coherent oscillator circuit as claimed in claim 1 additionally comprising: a phase shifter having an input coupled to the output of said reference oscillator and having an output, said phase shifter being for providing a second reference signal which exhibits a frequency approximately equal to a frequency exhibited by the reference signal and a phase shifted approximately 90° from a phase exhibited by the reference signal; a second phase detector having a first input coupled to the output of said switch, a second input coupled to the output of said phase shifter, and an output; a second storage element having a signal input coupled to the output of said second phase detector and an output for providing a second sampled phase signal; and a second subtractor having a first input coupled to the output of said second phase detector, a second input coupled to the output of said second storage element, and having an output coupled to said variable frequency oscillator.
Claim 8
Dependent Claim 59 words
A coherent oscillator circuit as claimed in claim 6 additionally comprising a gain controller having first and second inputs coupled to the outputs of said storage and second storage elements, respectively, third and fourth inputs coupled to the ouputs of said subtractor and second subtractor, respectively, and an output coupled to the control input of said variable frequency oscillator.
Claim 9
Dependent Claim 67 words
A coherent oscillator circuit as claimed in claim 7 wherein said gain controller comprises a second switch having a first signal input coupled to the output of said subtractor, a second signal input coupled to the output of said second subtractor, and an output coupled to the input of said variable frequency oscillator, said second switch being for providing an error signal to said variable frequency oscillator.
Claim 10
Dependent Claim 73 words
A coherent oscillator circuit as claimed in claim 8 wherein said gain controller additionally comprises an octant detector having a first input coupled to the output of said storage element, a second input coupled to the output of said second storage element, and an output coupled to said second switch, said octant detector being for controlling the operation of said second switch in response to the sampled phase and second sampled phase signals.
Claim 11
Dependent Claim 106 words
A coherent oscillator circuit as claimed in claim 9 wherein said gain controller additionally comprises a selective inverter having first and second inputs and an output for conditioning the error signal wherein: the first input of said selective inverter couples to the output of said second switch; the output of said selective inverter couples to the input of said variable frequency oscillator; and said octant detector additionally comprises a second output coupled to the second input of said selective inverter, said octant detector second output being for controlling the operation of said selective inverter so that a slope of the error signal exhibits a constant polarity.
Claim 12
Independent Claim 101 words
A method of regenerating phase and frequency characteristics of a master signal pulse, the method comprising the steps of: generating a signal responsive to a first phase difference between the master signal pulse and a reference oscillation signal; saving the signal of said generating step to produce a saved phase difference; controlling the frequency of a variable frequency oscillator signal with an error signal output from a subtractor; detecting a second phase difference between the variable frequency oscillator signal and the reference oscillation signal; and calculating the difference between the saved phase difference and the second phase difference in the subtractor.
Claim 13
Independent Claim 101 words
A method of regenerating phase and frequency characteristics of a master signal pulse, the method comprising the steps of: generating a signal responsive to a first phase difference between the master signal pulse and a reference oscillation signal; saving the signal of said generating step to produce a saved phase difference; controlling the frequency of a variable frequency oscillator signal with an error signal output from a subtractor; detecting a second phase difference between the variable frequency oscillator signal and the reference oscillation signal; and calculating the difference between the saved phase difference and the second phase difference in the subtractor.
Claim 14
Dependent Claim 93 words
A method as claimed in claim 11 wherein: said generating and detecting steps each produce in-phase and quadrature phase signals; said saving step produces in-phase and quadrature saved phase differences; said calculating step calculates an in-phase difference between the in-phase saved phase difference and the in-phase second phase difference, and said calculating step calculates a quadrature difference between the quadrature saved phase difference and the quadrature second phase difference; and the method additionally comprises the step of selecting one of said in-phase and quadrature differences to control the frequency in said controlling step.
Claim 15
Dependent Claim 35 words
A method as claimed in claim 12 additionally comprising the step of selectively inverting the difference selected in said selecting step in response to the in-phase and quadrature phase differences saved in said saving step.
Claim 16
Dependent Claim 257 words
A coherent demodulator circuit for providing a demodulated signal, said circuit comprising: a local oscillator having an output for providing a first reference signal; a first mixer having a first input adapted to receive a transmitted radio frequency signal, a second input coupled to the output of said local oscillator, and an output; a second mixer having a first input adapted to receive a received radio frequency signal, a second input coupled to the output of said local oscillator, and an output; a first switch having a first signal input coupled to the output of said first mixer, a second signal input, and an output; a first phase detector having a first input coupled to the output of said first switch, a second input adapted to receive a second reference signal, and an output; a first storage element having a signal input coupled to the output of said first phase detector and an output for providing a first sampled phase signal; a first subtractor having a first input coupled to the output of said phase detector, a second input coupled to the output of said first storage element, and having an output; a variable frequency oscillator having a control input coupled to the output of said first subtractor and an output coupled to the second signal input of said first switch; a second phase detector having a first input coupled to the output of said second mixer, a second input coupled to the output of said variable frequency oscillator, and an output for providing the demodulated signal.
Claim 17
Dependent Claim 257 words
A coherent demodulator circuit for providing a demodulated signal, said circuit comprising: a local oscillator having an output for providing a first reference signal; a first mixer having a first input adapted to receive a transmitted radio frequency signal, a second input coupled to the output of said local oscillator, and an output; a second mixer having a first input adapted to receive a received radio frequency signal, a second input coupled to the output of said local oscillator, and an output; a first switch having a first signal input coupled to the output of said first mixer, a second signal input, and an output; a first phase detector having a first input coupled to the output of said first switch, a second input adapted to receive a second reference signal, and an output; a first storage element having a signal input coupled to the output of said first phase detector and an output for providing a first sampled phase signal; a first subtractor having a first input coupled to the output of said phase detector, a second input coupled to the output of said first storage element, and having an output; a variable frequency oscillator having a control input coupled to the output of said first subtractor and an output coupled to the second signal input of said first switch; a second phase detector having a first input coupled to the output of said second mixer, a second input coupled to the output of said variable frequency oscillator, and an output for providing the demodulated signal.
Claim 18
Dependent Claim 113 words
A coherent demodulator circuit as claimed in claim 14 wherein: said first switch additionally comprises a control input for controlling the operation of said first switch, said first switch control input being configured so that said first switch connects the first signal input to the output of said first switch in a first mode and the second signal input to the output of said first switch in a second mode; said first storage element additionally comprises a control input for controlling the operation of said first storage element, said first storage element control input being configured so that said first storage element samples during the first mode and saves during the second mode.
Claim 19
Dependent Claim 114 words
A coherent demodulator circuit as claimed in claim 14 wherein said first phase detector represents a quadrature phase detector having first and second outputs, the first output of said first phase detector being coupled to the input of said first storage element, the demodulator additionally comprising: a second storage element having a signal input coupled to the second output of said first phase detector and an output for providing a second sampled phase signal; and a second subtractor having a first input coupled to the second output of said first phase detector, a second input coupled to the output of said second storage element, and having an output coupled to said variable frequency oscillator.
Claim 20
Dependent Claim 59 words
A coherent demodulator circuit as claimed in claim 14 additionally comprising a gain controller having first and second inputs coupled to the outputs of said first and second storage elements, respectively, third and fourth inputs coupled to the outputs of said first and second subtractors, respectively, and an output coupled to the control input of said variable frequency oscillator.
Claim 21
Dependent Claim 68 words
A coherent demodulator circuit as claimed in claim 17 wherein said gain controller comprises a second switch having a first signal input coupled to the output of said first subtractor, a second signal input coupled to the output of said second subtractor, and an output coupled to the input of said variable frequency oscillator, said second switch being for providing an error signal to said variable frequency oscillator.
Claim 22
Dependent Claim 65 words
A coherent demodulator circuit as claimed in claim 18 wherein said gain controller additionally comprises an octant detector having first and second inputs coupled to the outputs of said first and second storage elements, respectively, and an output coupled to said second switch, said octant detector being for controlling the operation of said second switch in response to the first and second sampled phase signals.
Claim 23
Dependent Claim 101 words
A coherent demodulator circuit as claimed in claim 19 wherein said gain controller additionally comprises a selective inverter having first and second inputs and an output for conditioning the error signal so that a slope of a second error signal at the output of said selective inverter exhibits a constant polarity, and wherein: the first input of said selective inverter couples to the output of said second switch; the output of said selective inverter couples to the input of said variable frequency oscillator; and said octant detector additionally comprises a second output coupled to the second input of said selective inverter.

References Cited (Backward Citations)

US4063188A Cited
US4095224A Cited
US4101844A Cited
US4204173A Cited
US4162459A Cited
US4389594A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-07-14 1990-01-13 1990-07-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-07-14 1994-01-13 1994-07-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-07-14 1998-01-13 1998-07-15 $7700.00 Window Closed / Lapsed

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