Microprocessor transient interrupt system adaptable for engine control

Claim 2

A microprocessor transient interrupt system comprising: microprocessor means for effectively monitoring at a first rate at least one input signal and providing at least one control output signal in response thereto in accordance with a predetermined main software program which implements a first predetermined relationship between said input and output signals, said microprocessor means including, internal thereto, interrupt means for interrupting said main software program and implementing an interrupt software program in response to receiving an interrupt signal and then reimplementing said main software program; and transient detector means coupled to and located external to said microprocessor means for substantially continuously monitoring a sensed parameter and providing said interrupt signal to said microprocessor means in response to detecting a predetermined change in said parameter indicative of the start of a transient condition of said parameter; said microprocessor means including disable means for, in response to said interrupt program, effectively preventing any additional execution of said interrupt software program after said interrupt program for a time duration calculated by said microprocessor means indicative of the continued existence of said transient condition, whereby said microprocessor prevents additional interrupts by said transient detector means during said time duration.

Claim 3

A microprocessor interrupt system according to claim 1 wherein said microprocessor means includes means for effectively reenabling execution of said interrupt program in response to determining the end of said transient condition by determining said input signal changes by less than a predetermined amount over a predetermined period of time, thus indicating the end of a transient condition for the parameter.

Claim 4

A microprocessor interrupt system according to claim 2 wherein said microprocessor means includes means for monitoring said input signal during said time duration and providing said output signal in accordance with a second predetermined relationship between said input and output signals.

Claim 5

A microprocessor interrupt system according to claim 3 wherein said second relationship is different from said first relationship.

Claim 6

A microprocessor interrupt system according to claim 4 wherein said microprocessor means includes means for reimplementing said first relationship between said input and output signals in response to said determining the end of said transient condition.

Claim 7

A microprocessor interrupt system according to claim 2 wherein said input signal is related to and determined by at least said parameter.

Claim 8

A microprocessor interrupt system according to claim 1 wherein said transient detector means includes means for providing said interrupt signal by comparing the rate of change of said parameter with at least one predetermined rate of change threshold.

Claim 9

A microprocessor interrupt system according to claim 7 wherein said input signal is related to and determined by said parameter, said transient detector means monitoring said parameter by monitoring said input signal.

Claim 10

A microprocessor interrupt system according to claim 1 wherein said microprocessor interrupt means implements said interrupt software program in response to being level sensitive to the magnitude of said interrupt signal rather than being edge sensitive to said interrupt signal.

Claim 11

A microprocessor interrupt system according to claim 1 wherein said transient detector means is disabled in response to receipt of a disable signal, and wherein said microprocessor disable means selectively provides said disable signal to said transient detector means during said time duration.

Claim 12

An engine control microprocessor transient interrupt system comprising: sensor means for providing an input signal related to throttle position of an engine; microprocessor means coupled to said sensor means for effectively monitoring at a first rate at least said input signal and providing at least one engine control output signal in response thereto in accordance with a predetermined main software program which implements a first predetermined relationship between said input and output signals, said microprocessor means including, internal thereto, interrupt means for interrupting said main software program and implementing an interrupt software program in response to receiving an interrupt signal and then reimplementing said main software program; and transient detector means coupled to and located external to said microprocessor means for substantially continuously monitoring a sensed engine parameter and providing said interrupt signal to said microprocessor means in response to detecting a predetermined change in said parameter indicative of the start of a transient condition of said parameter; said microprocessor means including disable means for, in response to said interrupt program, effectively preventing any additional execution of said interrupt software program after said interrupt program for a time duration calculated by said microprocessor means indicative of the continued existence of said transient engine condition, whereby said microprocessor prevents additional interrupts by said transient detector means during said time duration.

Claim 13

An engine control microprocessor transient interrupt system comprising: sensor means for providing an input signal related to throttle position of an engine; microprocessor means coupled to said sensor means for effectively monitoring at a first rate at least said input signal and providing at least one engine control output signal in response thereto in accordance with a predetermined main software program which implements a first predetermined relationship between said input and output signals, said microprocessor means including, internal thereto, interrupt means for interrupting said main software program and implementing an interrupt software program in response to receiving an interrupt signal and then reimplementing said main software program; and transient detector means coupled to and located external to said microprocessor means for substantially continuously monitoring a sensed engine parameter and providing said interrupt signal to said microprocessor means in response to detecting a predetermined change in said parameter indicative of the start of a transient condition of said parameter; said microprocessor means including disable means for, in response to said interrupt program, effectively preventing any additional execution of said interrupt software program after said interrupt program for a time duration calculated by said microprocessor means indicative of the continued existence of said transient engine condition, whereby said microprocessor prevents additional interrupts by said transient detector means during said time duration.

Claim 14

A microprocessor interrupt system according to claim 11 wherein said microprocessor means includes means for effectively reenabling execution of said interrupt program in response to determining the end of said transient condition by determining said input signal changes by less than a predetermined amount over a predetermined period of time, thus indicating the end of a transient condition for the parameter.

Claim 15

A microprocessor interrupt system according to claim 12 wherein said microprocessor means includes means for monitoring said input signal during said time duration and providing said output signal in accordance with a second predetermined relationship between said input and output signals.

Claim 16

A microprocessor interrupt system according to claim 13 wherein said second relationship is different from said first relationship.

Claim 17

A microprocessor interrupt system according to claim 14 wherein said microprocessor means includes means for reimplementing said first relationship between said input and output signals in response to said determining the end of said transient condition.

Claim 18

A microprocessor interrupt system according to claim 12 wherein said sensed engine parameter is related to and determined by at least engine throttle position.

Claim 19

A microprocessor interrupt system according to claim 11 wherein said transient detector means includes means for providing said interrupt signal by comparing the rate of change of said engine parameter with at least one predetermined rate of change threshold.

Claim 20

A microprocessor interrupt system according to claim 17 wherein said engine parameter is related to and determined by engine throttle position, said transient detector means monitoring said parameter by monitoring said input signal provided to said microprocessor.

Claim 21

A microprocessor interrupt system according to claim 11 wherein said microprocessor interrupt means implements said interrupt software program in response to being level sensitive to the magnitude of said interrupt signal rather than being edge sensitive to said interrupt signal.

Claim 22

A microprocessor interrupt system according to claim 11 wherein said transient detector means is disabled in response to receipt of a disable signal, and wherein said microprocessor disable means selectively provides said disable signal to said transient detector means during said time duration.