Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
185 words
A signal conditioning circuit having a transducer, with a mechanical input for sensing movement and an electrical input which is excited by a carrier frequency signal to provide a modulated output signal indicative of the mechanical movement sensed, and a demodulator connected to the output of the transducer for demodulating the transducer's output signal, characterized by: a relatively high frequency oscillator; a counter connected to the oscillator and providing a lower frequency signal for driving the demodulator; a programmable memory having preprogrammed data stored therein and addressed by output signals from said counter, said memory having a first output connected with said demodulator and providing a first digital output of a processed sine wave defining a reference signal having a first selected phase, and having a second output providing a second digital output of a processed sine wave having a second selected phase; and, a digital to analog converter connected with the second output of said memory for converting the second digital sine wave output from said memory to an analog sine wave output which is conneceted to provide the excitation signal to said transducer.
Claim 2
Dependent Claim
185 words
A signal conditioning circuit having a transducer, with a mechanical input for sensing movement and an electrical input which is excited by a carrier frequency signal to provide a modulated output signal indicative of the mechanical movement sensed, and a demodulator connected to the output of the transducer for demodulating the transducer's output signal, characterized by: a relatively high frequency oscillator; a counter connected to the oscillator and providing a lower frequency signal for driving the demodulator; a programmable memory having preprogrammed data stored therein and addressed by output signals from said counter, said memory having a first output connected with said demodulator and providing a first digital output of a processed sine wave defining a reference signal having a first selected phase, and having a second output providing a second digital output of a processed sine wave having a second selected phase; and, a digital to analog converter connected with the second output of said memory for converting the second digital sine wave output from said memory to an analog sine wave output which is conneceted to provide the excitation signal to said transducer.
Claim 3
Dependent Claim
36 words
A signal conditioning circuit as claimed in claim 1 characterized by: a filter connected between the output of said digital to analog converter and the input to said transducer for smoothing the sine wave excitation signal.
Claim 4
Dependent Claim
54 words
A signal conditioning circuit as claimed in claim 1 characterized by: said memory having sufficient capacity to store a plurality of processed sine waves; and, selecting means connected to said memory means for selecting the sine wave which is to be outputed from said memory means in response to address signals from said counter.
Claim 5
Dependent Claim
29 words
A signal conditioning circuit as claimed in claim 3 characterized by: latch means connected to the output of said memory means for receiving and latching said second digital output.
Claim 6
Dependent Claim
41 words
A signal conditioning circuit as claimed in claim 4 characterized by: said transducer is a linear variable differential tansformer; and, an averaging circuit connected to the transformer; of said demodulator for removing unwanted higher frequency components from the demodulator output signal.
Claim 7
Dependent Claim
158 words
A stabilized phase sensitive demodulator circuit comprising: a high frequency oscillator; counter means for receiving and dividing the output signal from said oscillator; programmable memory means having at least two sets of sine functions, which are phase shifted by predetermined angles, stored therein and responsive to address bits from the counter for providing first and second digital outputs respectively of said stored sine functions; a digital to analog converter responsive to the first output of said programmable memory means for providing an analog output of the sine function; a transducer having a primary winding, connected to receive the output signal from said analog to digital converter, and a mechanical input, for sensing movement, providing a modulated output signal representative of the mechanical input movement; and demodulator means connected to receive the modulated output signal from said transducer and the second output from said memory means for providing an output signal representative of the mechanical input to said transducer.
Claim 8
Dependent Claim
158 words
A stabilized phase sensitive demodulator circuit comprising: a high frequency oscillator; counter means for receiving and dividing the output signal from said oscillator; programmable memory means having at least two sets of sine functions, which are phase shifted by predetermined angles, stored therein and responsive to address bits from the counter for providing first and second digital outputs respectively of said stored sine functions; a digital to analog converter responsive to the first output of said programmable memory means for providing an analog output of the sine function; a transducer having a primary winding, connected to receive the output signal from said analog to digital converter, and a mechanical input, for sensing movement, providing a modulated output signal representative of the mechanical input movement; and demodulator means connected to receive the modulated output signal from said transducer and the second output from said memory means for providing an output signal representative of the mechanical input to said transducer.
Claim 9
Dependent Claim
32 words
A stabilized phase sensitive demodulator circuit as claimed in claim 6 comprising: and averaging circuit provided at the output of said demodulator for removing unwanted AC components from the demodulator output signal.
Claim 10
Dependent Claim
34 words
A stabilized phase sensitive demodulator circuit as claimed in claim 6 comprising: a filter connected between the output of said digital to analog converter and the input to said transducer for smoothing the signal.
Claim 11
Dependent Claim
49 words
A stabilized phase sensitive demodulator circuit as claimed in claim 6 comprising: a latch provided at the output of said programmable memory for receiving and latching said first digital output; and, a filter provided between the output of said digital to analog converter and the input to said transducer.
Claim 12
Dependent Claim
184 words
A signal conditioning circuit for extracting a signal from an excited transducer comprising: an oscillator; counter means for receiving an input from said oscillator and providing a lower frequency output; a programmable memory having programmed data stored therein and addressed by the output of said counter means for providing a first digital representation sine output defining a reference signal having a first selected phase, and for providing a second digital representation sine output having a second selected phase which is different in phase than said first selected phase by an amount determined by the programmed data stored in said memory; a transducer having a mechanical input, connected to sense movement, and a primary winding, for providing a modulated signal output which is a function of the mechanical movement sensed; a digital to analog converter responsive to the second digital sine output from said memory for providing an analog output excitation signal which is delivered to said primary winding; and, a demodulator connected to receive the modulated output signal from said transducer and operable in response to said reference signal to provide phase sensitive demodulation.
Claim 13
Dependent Claim
184 words
A signal conditioning circuit for extracting a signal from an excited transducer comprising: an oscillator; counter means for receiving an input from said oscillator and providing a lower frequency output; a programmable memory having programmed data stored therein and addressed by the output of said counter means for providing a first digital representation sine output defining a reference signal having a first selected phase, and for providing a second digital representation sine output having a second selected phase which is different in phase than said first selected phase by an amount determined by the programmed data stored in said memory; a transducer having a mechanical input, connected to sense movement, and a primary winding, for providing a modulated signal output which is a function of the mechanical movement sensed; a digital to analog converter responsive to the second digital sine output from said memory for providing an analog output excitation signal which is delivered to said primary winding; and, a demodulator connected to receive the modulated output signal from said transducer and operable in response to said reference signal to provide phase sensitive demodulation.
Claim 14
Dependent Claim
35 words
A signal conditioning circuit as claimed in claim 10 comprising: averaging means connected at the output of said demodulator to provide a DC signal which is proportional to the mechanical movement sensed by said transducer.
Claim 15
Dependent Claim
49 words
A signal conditioning circuit as claimed in claim 10 comprising: a latch provided at the output of said memory for receiving and latching said second digital representation sine output signal; and, a filter provided between the output of said digital to analog converter and the input to said transducer.
Claim 16
Dependent Claim
18 words
A signal conditioning circuit as claimed in claim 10 wherein said transducer is a linear variable displacement transformer.