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US4597002A Expired / Lapsed US ⏱️ 0.0 years remaining

Flow through ISFET and method of forming

Assignee: Intersil Corp
•
Filing: 1985-03-18
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Granted: 1986-06-24
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Expires: 2005-03-18
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Abstract

Abstract Three-dimensional diode arrays have been produced in semiconductor wafers by a two-step process involving laser drilling and solid-state diffusion. Holes are first produced in the wafer in various arrays by laser drilling. Under suitable conditions, laser drilling causes little or no damage to the wafer. Cylindrical P-N junctions are then formed around the laser-drilled holes by diffusing an impurity into the wafer from the walls of the hole. A variety of distinctly different ISFET devices is produced.

Inventors

  • 👤 Thomas R. Anthony

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 05:44
CPC Classifications
H; H10; H10P; H10P34/00; H10P34/40; H10P34/42; G; G01; G01N; G01N27/00; G01N27/26; G01N27/403; G01N27/414

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 115 words
A nonplanar ISFET device comprising: a semiconductor body of a first conductivity type having first and second opposing major surfaces; first and second surface impurity zones adjacent the first and second major surfaces of the body, the impurity zones being oppositely disposed and spaced apart from one another; one or more bores extending between the first and the second major surfaces of the body and transversely intersecting the first and the second impurity zones; first and second connection means making electrical contact with the first and second impurity zones, respectively, on the first and second major surfaces of the body respectively; and an ion-sensitive insulating layer covering the inner surface of each of the bores.
Claim 2
Dependent Claim 115 words
A nonplanar ISFET device comprising: a semiconductor body of a first conductivity type having first and second opposing major surfaces; first and second surface impurity zones adjacent the first and second major surfaces of the body, the impurity zones being oppositely disposed and spaced apart from one another; one or more bores extending between the first and the second major surfaces of the body and transversely intersecting the first and the second impurity zones; first and second connection means making electrical contact with the first and second impurity zones, respectively, on the first and second major surfaces of the body respectively; and an ion-sensitive insulating layer covering the inner surface of each of the bores.
Claim 3
Dependent Claim 62 words
The ISFET device of claim 1 wherein the first and the second connection means each comprises first and second metallic contacts respectively overlying the first and the second major surfaces of the body, each of the metallic contacts being in contact with a respective one of the first and the second impurity zones and spaced apart from the one or more bores.
Claim 4
Dependent Claim 26 words
The ISFET device of claim 1 wherein the ion-sensitive insulating layer comprises a thermally grown oxide layer on the inner surface of each of the bores.
Claim 5
Dependent Claim 26 words
The ISFET device of claim 1 wherein the semiconductor body is monocrystalline silicon, the first conductivity type is P-type and the second conductivity type is N-type.
Claim 6
Dependent Claim 17 words
The ISFET device of claim 1 wherein the one or more bores are formed by laser drilling.
Claim 7
Dependent Claim 17 words
The ISFET device of claim 5 wherein the one or more bores are formed by ultrasonic drilling.

References Cited (Backward Citations)

US4056726A Cited
US4527183A Cited
US4471369A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-06-23 1989-12-23 1990-06-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-06-23 1993-12-23 1994-06-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-06-23 1997-12-23 1998-06-24 $7700.00 Window Closed / Lapsed

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