US4595966A
Expired / Lapsed
US
⏱️ 0.0 years remaining
For the protection of an MOS-transistor from overloading
Assignee: Siemens AG
•
Filing: 1983-11-02
•
Granted: 1986-06-17
•
Expires: 2003-11-02
Abstract
Abstract An arrangement for the protection of a transistor, particularly a MOS-switching transistor including a zener diode connected between the gate and source terminals for limiting the gate potential and a switch-off transistor connected to the control circuit of the MOS-transistor for grounding the gate thereof and switching it off. First and second monitoring circuits are coupled between the MOS-transistor and the switch-off transistor for producing a signal switching on the switch-off transistor in response to a drop in the load current and an increase in the output voltage of the MOS-transistor. First and second timing circuits block the signals of the monitoring circuits for predetermined intervals.
Inventors
- 👤 Anton Huber
- 👤 Jeno Tihanyi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 03:00
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/08; H03K17/082; H03K17/0822
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
312 words
An arrangement for the protection of a switching MOS-transistor (1) having source and drain terminals forming a switching output (120, 130) connected between a load circuit containing a lamp (4) and a DC source (UB), and a gate terminal for switching on the MOS-transistor, comprising: a control circuit (U1, 8, 5, 7, 6) connected to the gate terminal of the MOS-transistor for producing a switch-on signal for switching on the MOS-transistor, a zener diode (9) connected between the gate and source terminals of the MOS-transistor for limiting the gate potential and thereby the load current through the drain and source terminals to a predetermined threshold value, a switch-off transistor (2) connected to the control circuit for rendering inoperative the switch-on signal when the switch-off transistor is switched on, a first monitoring circuit (10, 3) coupled between the source terminal of the MOS-transistor and the base of the switch-off transistor for producing a first switch-off signal to switch on the switch-off transistor for as long as the voltage drop at the load circuit is less than a minimum value, a first coupling diode (16) connected to conduct the first switch-off signal from the first monitoring circuit to the base of the switch-off transistor, a first timing element (17) connected to the first monitoring circuit which blocks the first switch-off signal for a first predetermined time interval, a second monitoring circuit (19, 22) coupled between the switching output and the switch-off transistor for producing a second switch-off signal to switch on the switch-off transistor when the voltage at the switching output exceeds a predetermined threshold value, a second coupling diode (29) connected to conduct the second switch-off signal from the second monitoring circuit to the base of the switch-off transistor, and a second timing element (26) connected to the second monitoring circuit which blocks the second switch-off signal for a second predetermined time interval.
Claim 2
Dependent Claim
312 words
An arrangement for the protection of a switching MOS-transistor (1) having source and drain terminals forming a switching output (120, 130) connected between a load circuit containing a lamp (4) and a DC source (UB), and a gate terminal for switching on the MOS-transistor, comprising: a control circuit (U1, 8, 5, 7, 6) connected to the gate terminal of the MOS-transistor for producing a switch-on signal for switching on the MOS-transistor, a zener diode (9) connected between the gate and source terminals of the MOS-transistor for limiting the gate potential and thereby the load current through the drain and source terminals to a predetermined threshold value, a switch-off transistor (2) connected to the control circuit for rendering inoperative the switch-on signal when the switch-off transistor is switched on, a first monitoring circuit (10, 3) coupled between the source terminal of the MOS-transistor and the base of the switch-off transistor for producing a first switch-off signal to switch on the switch-off transistor for as long as the voltage drop at the load circuit is less than a minimum value, a first coupling diode (16) connected to conduct the first switch-off signal from the first monitoring circuit to the base of the switch-off transistor, a first timing element (17) connected to the first monitoring circuit which blocks the first switch-off signal for a first predetermined time interval, a second monitoring circuit (19, 22) coupled between the switching output and the switch-off transistor for producing a second switch-off signal to switch on the switch-off transistor when the voltage at the switching output exceeds a predetermined threshold value, a second coupling diode (29) connected to conduct the second switch-off signal from the second monitoring circuit to the base of the switch-off transistor, and a second timing element (26) connected to the second monitoring circuit which blocks the second switch-off signal for a second predetermined time interval.
Claim 3
Dependent Claim
44 words
The arrangement of claim 1 wherein the first monitoring circuit includes a transistor having a base coupled to the source terminal of the MOS-transistor through a zener diode, a grounded emitter, and a collector connected to the DC source and the first coupling diode.
Claim 4
Dependent Claim
48 words
The arrangement of claim 1 wherein the second monitoring circuit includes an operational amplifier having a first input connected to the DC source through a voltage divider and a second input connected to the source terminal of the MOS-transistor and an output connected to the second coupling diode.
Claim 5
Dependent Claim
44 words
The arrangement of claims 1 or 2 or 3 wherein said first and second timing elements each include an operational amplifier which is connected with a first input to the DC source and a second input to the control circuit through a resistance-capacitance circuit.
Claim 6
Dependent Claim
29 words
The arrangement of claim 1 wherein the first predetermined time interval of said first timing element is less than the second predetermined time interval of said second timing element.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-06-16 | 1989-12-16 | 1990-06-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-06-16 | 1993-12-16 | 1994-06-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-06-16 | 1997-12-16 | 1998-06-17 | $7700.00 | Window Closed / Lapsed |