Solid state, high-low resistance monitor

Claim 1

A resistance monitoring circuit for providing first or second logic level signals as a first output indicative of the presence or absence of at least a predetermined high ohmic condition of the monitored resistance and for providing third or fourth logic level signals as a second output indicative of presence or absence of a predetermined low ohmic condition of the monitored resistance, said circuit comprising: a voltage source; first voltage divider means connected to said voltage source for providing a first control voltage; second voltage divider means connected to said voltage source and including said monitored resistance for providing a second control voltage that changes relative to said first control voltage with changes in said monitored resistance; current regulating means, connected to said voltage source, for providing a source of regulated current; means defining first and second current paths comprising first and second current to voltage logic level conversion means, respectively; and first and second solid state switching means, responsive to said first and second control voltages, for directing substantially all said regulated current from said current source through said first current path only when said first control voltage exceeds said second control voltage by a predetermined amount that is small relative to said control voltages and through said second current path only when said second control voltage exceeds said first control voltage by a like predetermined amount, whereby said first conversion means provides as said first output said first logic level signal only when said predetermined high ohmic condition exists and said second logic level signal only when said predetermined high ohmic condition does not exist, and provides as said second output said third logic level signal only when said predetermined low ohmic condition exists and said fourth logic level signal only when said low ohmic condition does not exist.