Rectifying network

Claim 2

A rectifying network comprising in combination: a pair of terminals; a diode; a saturable reactor including a core and a first winding would on said core, said first winding being connected in series with said diode between said terminals; and means for biasing said core into saturation for forward diode current flow.

Claim 3

A rectifying network as recited in claim 1 wherein said biasing means includes current source means and a second winding wound on said core, said second winding being connected across said current source.

Claim 4

A rectifying network as recited in claim 2 wherein said current source means includes voltage source means and a current limiting resistor connected in series with said voltage source means.

Claim 5

A rectifying network as recited in claim 1 further comprising a resistor connected across said first winding, said resistor for limiting to a predetermined level the voltage developed across said first winding when said bias means resets said core following cessation of reverse diode current flow.

Claim 6

In a power converter employing an energy storing inductor a transistor-switch and a rectifying means, an improved rectifying means comprising in combination: a pair of terminals; a semiconductor diode; a saturable reactor including a core and a first winding connected in series with said diode between said terminals; and means for biasing said core into saturation for forward diode current flow.

Claim 7

In a power converter employing an energy storing inductor a transistor-switch and a rectifying means, an improved rectifying means comprising in combination: a pair of terminals; a semiconductor diode; a saturable reactor including a core and a first winding connected in series with said diode between said terminals; and means for biasing said core into saturation for forward diode current flow.

Claim 8

In a power converter as recited in claim 5 wherein said biasing means includes current source means and a second winding wound on said core, said second winding being connected across said current source.

Claim 9

In a power converter as recited in claim 5 further comprising a resistor connected across said first winding, said resistor for limiting to a predetermined level the voltage developed across said first winding when said bias means resets said core following each cessation of reverse diode current flow.

Claim 10

A boost converter comprising in combination: a node for connection to a voltage source; a central node; a node for connection to a load; a common node; an energy storing inductor connected between said source and said central nodes; switching means connected between said central and said common nodes; a rectifying network including a semiconductor diode, a saturable reactor having a core and a first winding wound on said core, said first winding being connected in series with said diode between said central and said load nodes, and means for biasing said core into saturation for forward diode current flow; and means for driving said switching means so as to maintain the potential developed at said load node at a predetermined level.

Claim 11

A boost converter comprising in combination: a node for connection to a voltage source; a central node; a node for connection to a load; a common node; an energy storing inductor connected between said source and said central nodes; switching means connected between said central and said common nodes; a rectifying network including a semiconductor diode, a saturable reactor having a core and a first winding wound on said core, said first winding being connected in series with said diode between said central and said load nodes, and means for biasing said core into saturation for forward diode current flow; and means for driving said switching means so as to maintain the potential developed at said load node at a predetermined level.

Claim 12

A boost converter as recited in claim 8 wherein said network further includes a resistor connected across said first winding, said resistor for limiting to a predetermined level the voltage developed across said first winding when said bias means resets said core following each cessation of reverse diode current flow.

Claim 13

A power converter for developing from a voltage source an output voltage of predetermined level for driving a load, the power converter comprising in combination: a first node; a second node; a third node, a pair of said first, second and third nodes for connection to the voltage source and another pair of said first, second and thrid nodes for connection to the load; a central node; an energy storing inductor connected between said first and said central nodes; a switching means connected between said second and said central nodes; a rectifying network including a semiconductor diode, a saturable reactor having a core and a first winding wound on said core, said first winding being connected in series with said diode between said third and said central nodes, and means for biasing said core into saturation for forward diode current flow; and means for driving said switching means so as to maintain the output voltage at the predetermined level.

Claim 14

A power converter for developing from a voltage source an output voltage of predetermined level for driving a load, the power converter comprising in combination: a first node; a second node; a third node, a pair of said first, second and third nodes for connection to the voltage source and another pair of said first, second and thrid nodes for connection to the load; a central node; an energy storing inductor connected between said first and said central nodes; a switching means connected between said second and said central nodes; a rectifying network including a semiconductor diode, a saturable reactor having a core and a first winding wound on said core, said first winding being connected in series with said diode between said third and said central nodes, and means for biasing said core into saturation for forward diode current flow; and means for driving said switching means so as to maintain the output voltage at the predetermined level.

Claim 15

A buck converter comprising in combination: a node for connection to a voltage source; a central node; a node for connection to a load; a common node; an energy storing inductor connected between said central and said load nodes; switching means connected between said source and said central nodes; a rectifying network including a semiconductor diode, a saturable reactor having a core and a first winding wound on said core, said first winding being connected in series with said diode between said central and said common nodes, and means for biasing said core into saturation for forward diode current flow; and means for driving said switching means so as to maintain the potential developed at said load node at a predetermined level.

Claim 16

A buck converter comprising in combination: a node for connection to a voltage source; a central node; a node for connection to a load; a common node; an energy storing inductor connected between said central and said load nodes; switching means connected between said source and said central nodes; a rectifying network including a semiconductor diode, a saturable reactor having a core and a first winding wound on said core, said first winding being connected in series with said diode between said central and said common nodes, and means for biasing said core into saturation for forward diode current flow; and means for driving said switching means so as to maintain the potential developed at said load node at a predetermined level.

Claim 17

A rectifying network comprising in combination: a pair of terminals; a semiconductor junction; a saturable reactor including a core and a first winding would on said core, said first winding being connected in series with said semiconductor junction between said terminals; and means for biasing said core into saturation for forward diode current flow.

Claim 18

A rectifying network comprising in combination: a pair of terminals; a semiconductor junction; a saturable reactor including a core and a first winding would on said core, said first winding being connected in series with said semiconductor junction between said terminals; and means for biasing said core into saturation for forward diode current flow.

Claim 21

A method as recited in claim 13 wherein the step of biasing said core into saturation includes the step of passing a biasing current through a second winding wound on said core.