US4591912A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Peaking circuit for video driver stage
Assignee: RCA Licensing Corp
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Filing: 1984-10-30
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Granted: 1986-05-27
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Expires: 2004-10-30
Abstract
Abstract A kinescope driver stage in a television receiver includes an input pre-driver transistor and an output driver transistor arranged in a cascode amplifier configuration. To enhance the high frequency response of the driver stage, a capacitor is coupled from the signal input of the driver transistor to a point of reference potential.
Inventors
- 👤 Isaac M. Belotserkovsky
- 👤 David E. Hollinden
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 23:38
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/64; H04N9/648
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
128 words
In a video signal processing and display system including a source of video signals, and an image display device having an intensity control electrode, a video output driver stage comprising: an input amplifier with an input electrode coupled to said source of video signals, and an output electrode; an output amplifier arranged in a cascode amplifier configuration with said input amplifier, said output amplifier having an input electrode coupled to said output electrode of said input amplifier, and an output electrode coupled to said intensity control electrode of said display device for providing video drive signals thereto; and a peaking capacitance coupled from said input electrode of said output amplifier to a source of reference potential via a low impedance path for peaking high frequency video signal components.
Claim 2
Dependent Claim
128 words
In a video signal processing and display system including a source of video signals, and an image display device having an intensity control electrode, a video output driver stage comprising: an input amplifier with an input electrode coupled to said source of video signals, and an output electrode; an output amplifier arranged in a cascode amplifier configuration with said input amplifier, said output amplifier having an input electrode coupled to said output electrode of said input amplifier, and an output electrode coupled to said intensity control electrode of said display device for providing video drive signals thereto; and a peaking capacitance coupled from said input electrode of said output amplifier to a source of reference potential via a low impedance path for peaking high frequency video signal components.
Claim 3
Dependent Claim
61 words
A driver stage according to claim 1, wherein said output electrode of said input amplifier is coupled to said input electrode of said output amplifier via a connecting wire subject to radiating high frequency video signal components; and said peaking capacitance is coupled nearer to said input electrode of said output amplifier than to said output electrode of said input amplifier.
Claim 4
Dependent Claim
50 words
A driver stage according to claim 2, wherein a video signal path for conveying video signals to said input electrode of said input amplifier includes a low pass filter for attenuating high frequency components of said video signal; and said peaking capacitance assists to restore said attenuated high frequency components.
Claim 5
Dependent Claim
64 words
A driver stage according to claim 1, wherein said image display device is a kinescope with a cathode intensity control electrode; said input amplifier comprises a first transistor with a base input electrode, a collector output electrode and a common emitter electrode; and said output amplifier comprises a second transistor with an emitter input electrode, a collector output electrode and a common base electrode.
Claim 6
Dependent Claim
62 words
A driver stage according to claim 4, wherein a source of bias voltage is coupled to said base electrode of said second transistor; a capacitive filter network is coupled to said bias source for filtering said bias voltage; and said peaking capacitance is a capacitor coupled from said emitter of said second transistor, to said reference potential via said capacitive filter network.
References Cited (Backward Citations)
US4463385A
Cited
US4549214A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-05-26 | 1989-11-25 | 1990-05-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-05-26 | 1993-11-25 | 1994-05-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-05-26 | 1997-11-25 | 1998-05-27 | $7700.00 | Window Closed / Lapsed |