US4591827A
Expired / Lapsed
US
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PCM coder-decoder
Assignee: Hitachi Microcomputer System Ltd
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Filing: 1985-02-15
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Granted: 1986-05-27
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Expires: 2005-02-15
Abstract
Abstract Disclosed is a PCM coder-decoder having a construction such that a digital filter contained originally in the PCM coder-decoder is utilized on the time division basis in order to fold back a digital reception signal to a digital signal transmission side and thus to accomplish interruption, communication exchange between three parties, gain control, fold-over test of the PCM signal, and so forth, in addition to the coding and decoding functions inherent to the PCM coder-decoder.
Inventors
- 👤 Shigeo Nishita
- 👤 Kazuo Yamakido
- 👤 Kenichi Ohwada
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 22:00
CPC Classifications
H; H03; H03M; H03M7/00; H04; H04M; H04M3/00; H04M3/42; H04M3/56; H04M3/561; H04J; H04J3/00; H04J3/02; H04J3/14
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
172 words
A PCM coder-decoder comprising: a coder portion including an A/D convertor for converting an analog signal to a digital signal, a first digital filter connected to the output of said A/D convertor, and an output control circuit processing the output of said first digital filter and producing the output as a PCM signal to a transmitter; a decoder portion including an input control circuit receiving said PCM signal from a transmission line and processing said PCM signal, a second digital filter processing a digital signal received from said input control circuit, and a D/A convertor decoding the output of said second digital filter to the analog signal; and a plurality of kinds of registers holding respectively a plurality of kinds of signals obtained from said input control circuit; said first digital filter executing filtration processing of the output of said A/D convertor and addition of the output of a plurality of said registers and the filtered output on the time division basis by means of the signals from said output control circuit.
Claim 2
Dependent Claim
172 words
A PCM coder-decoder comprising: a coder portion including an A/D convertor for converting an analog signal to a digital signal, a first digital filter connected to the output of said A/D convertor, and an output control circuit processing the output of said first digital filter and producing the output as a PCM signal to a transmitter; a decoder portion including an input control circuit receiving said PCM signal from a transmission line and processing said PCM signal, a second digital filter processing a digital signal received from said input control circuit, and a D/A convertor decoding the output of said second digital filter to the analog signal; and a plurality of kinds of registers holding respectively a plurality of kinds of signals obtained from said input control circuit; said first digital filter executing filtration processing of the output of said A/D convertor and addition of the output of a plurality of said registers and the filtered output on the time division basis by means of the signals from said output control circuit.
Claim 3
Dependent Claim
112 words
The PCM coder-decoder according to claim 1 wherein said first digital filter includes: an adder for adding first signals and feedback signals applied through a first switch group changing over the output of said A/D convertor and the output of a plurality of said registers on the time division basis; a delay register group delaying the output of said adder; a feedback circuit using a product signal obtained by multiplying the output of said register group by a multiplier as the feedback signal; and a second switch group selecting a plurality of multiplier input terminals and said input terminals on the time division basis as the portion for obtaining said product signal.
Claim 4
Dependent Claim
34 words
The PCM coder-decoder according to claim 2 wherein a plurality of kinds of said registers are first and second registers for storing first and second audio signals obtained by said input control circuit, respectively.
Claim 5
Dependent Claim
52 words
The PCM coder-decoder according to claim 3 wherein said first digital filter has a transfer function H(Z) satisfying the following relation: ##EQU2## where a 1 , a 2 , b 1 and b 2 are multipliers applied through said second switch group, and Z -m is an operator of the Z function.
Claim 6
Dependent Claim
154 words
The PCM coder-encoder according to claim 1 wherein said output control circuit includes: a code compander for converting the code of the output of said first digital filter; third and fourth registers; a first switch changeably applying the output of said code compander to said third and fourth registers; a second switch changing over the output of said third and fourth registers and sending it to said transmission line; and a timing signal generator enabling the time division operation of said first digital filter and driving said first and second switches; and said input control circuit includes: an input buffer register holding a reception PCM signal; an expander converting the signal from said input buffer register; a third switch changeably applying the output of said expander to a plurality of said registers; and a timing signal generator controlling the write-in and read-out operation of a plurality of said registers and controlling said third switch.
Claim 7
Dependent Claim
103 words
The PCM coder-decoder according to claim 5 wherein said first digital filter includes: an adder for adding first signals and feedback signals applied through a first switch group changing over the output of said A/D convertor and the output of said third and fourth registers on the time division basis; a delay register group delaying the output of said adder; a multiplyer multiplying the output of said register group by a multiplier; a feedback circuit using the output of said register group and said adder as the feedback signal; and a second switch group selecting the multipliers to be multiplied by said multiplyer.
Claim 8
Dependent Claim
92 words
The PCM coder-decoder according to claim 6 wherein said first digital filter has different operation modes consisting of a plurality of steps obtained by dividing the sampling period into a plurality of time steps, has at a part of said steps the characterisitcs of a high-pass filter having a transfer fucntion H(Z) of the following formula with respect to the output of said A/D convertor, and at the other of said steps operates in such a fashion as to add the output of said filter to said third and fourth output: ##EQU3##
References Cited (Backward Citations)
US4119807A
Cited
US4190742A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-05-26 | 1989-11-25 | 1990-05-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-05-26 | 1993-11-25 | 1994-05-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-05-26 | 1997-11-25 | 1998-05-27 | $7700.00 | Window Closed / Lapsed |