Low power, low voltage oscillator

Claim 2

A low power, low voltage oscillator circuit, comprising in combination: an amplifier having an input and an output, said amplifier having at least a first, second and third stage, each stage having an input, an output, and an associated output current, wherein said first stage input is connected to said amplifier input, and said third stage output is connected to said amplifier output, said stages being interconnected in a cascade fashion, whereby the output of a preceding stage is connected to the input of the following stage; said second stage including a current mirror circuit wherein said second stage output current is substantially a first fixed multiple of the preceding stage output current; said third stage including a current mirror circuit wherein said third stage output current is substantially a second fixed multiple of the preceding stage output current; a feedback biasing means, connected between said amplifier output and said amplifier input, for biasing said amplifier stages in their respective operating regions; and a tuned circuit means, connected between said amplifier output and said amplifier input, for selecting the frequency of oscillation.

Claim 3

A low power, low voltage oscillator circuit, according to claim 1, wherein said first stage comprises a common emitter transistor amplifier, the base of said transistor amplifier being connected to said first stage input and the collector of said transistor amplifier being connected to said first stage output.

Claim 4

A low power, low voltage oscillator circuit, according to claim 2, wherein said common emitter transistor amplifier comprises a first NPN transistor, the emitter of said first NPN transistor being connected to ground through a first resistor.

Claim 5

The low power, low voltage oscillator of claim 3 wherein: said second stage comprises a PNP transistor having a first and second collector, said first collector being connected to the base of said PNP transistor and to the input of said second stage, said second collector being connected to the output of said second stage, the emitter of said PNP transistor being connected to a source of positive voltage; and said third stage comprises a diode and a second NPN transistor, the anode of said diode being connected to the base of said second NPN transistor and to the input of said third stage, the cathode of said diode being connected to ground through a second resistor, the emitter of said second NPN transistor being connected to ground, and the collector of said second NPN transistor being connected to said source of positive voltage through a pair of series connected resistors, the junction of said pair of resistors being connected to said third stage output.

Claim 6

The low power, low voltage oscillator of claim 4, wherein said tuned circuit means comprises: a quartz crystal, connected between said amplifier output and input; a first capacitor connector between said amplifier output and ground; and a second capacitor connected between said amplifier input and ground.

Claim 7

The low power, low voltage oscillator circuit of claim 4, further comprising: an interface circuit, connected to the output of said third stage, said interface circuit having a third NPN transistor connected to said output of said third stage through a third resistor, the emitter of said third NPN transistor being connected to ground, and the collector of said third NPN transistor being connected to a second source of positive voltage through a fourth resistor, the collector of said third NPN transistor being connected to the output of said interface circuit.

Claim 8

A low power, low voltage oscillator, according to claim 1, wherein said second stage current mirror circuit comprises a dual collector transistor having a first and a second collector, said first collector being connected to the base of said dual collector transistor and to the input of said second stage, said second collector being connected to the output of said second stage.

Claim 9

A low power, low voltage oscillator circuit, according to claim 1, wherein said third stage current mirror circuit comprises a diode and a transistor, said diode being connected to the base of said transistor and to the input of said third stage, and the collector of said transistor being connected to a pair of series connected resistors, the junction of said pair of resistors being connected to said third stage output.

Claim 10

The low power, low voltage oscillator circuit, according to claim 8, wherein said tuned circuit means comprises: a quartz crystal connected between said amplifier output and input; a first capacitor connected to said amplifier output; and a second capacitor connected to said amplifier input.

Claim 11

A low power, low voltage oscillator circuit, comprising in combination: an amplifier having a plurality of interconnected current mirror amplifying stages, said amplifier having an input and an output; a feedback biasing means, connected between said amplifier output and said amplifier input, for biasing said amplifier stages in their respective operating regions; a tuned circuit means, connected between said amplifier output and said amplifier input, for selecting the frequency of oscillation; and an interface circuit means, connected to said output of said amplifier, for increasing the amplitude of an amplifier output signal at said output of said amplifier, whereby the output signal of the interface circuit may be used to drive other circuits that operate at voltages higher than the output voltage of the oscillator.

Claim 12

A low power, low voltage oscillator circuit, comprising in combination: an amplifier having a plurality of interconnected current mirror amplifying stages, said amplifier having an input and an output; a feedback biasing means, connected between said amplifier output and said amplifier input, for biasing said amplifier stages in their respective operating regions; a tuned circuit means, connected between said amplifier output and said amplifier input, for selecting the frequency of oscillation; and an interface circuit means, connected to said output of said amplifier, for increasing the amplitude of an amplifier output signal at said output of said amplifier, whereby the output signal of the interface circuit may be used to drive other circuits that operate at voltages higher than the output voltage of the oscillator.

Claim 13

The low power, low voltage oscillator circuit of claim 10, wherein said interface circuit means comprises a transistor, the base of said transistor being connected to said output of said amplifier through a first resistor, and the collector of said transistor being connected to a second resistor and to the output of said interface circuit means.

Claim 14

In a paging receiver including a decoder circuit for decoding information transmitted to the paging receiver, a low power, low voltage oscillator circuit connected to said decoder circuit, said oscillator circuit comprising in combination: an amplifier having an input and an output, said amplifier having a first, second and third stage, each stage having an input, an output, and an associated output current, wherein said first stage input is connected to said amplifier input, and said third stage output is connected to said amplifier output, said stages being interconnected in a cascade fashion, whereby the output of a preceding stage is connected to the input of the following stage; a feedback biasing means connected between said amplifier output and said amplifier input, for biasing said amplifier stages in their respective operating regions; and a tuned circuit means including a quartz crystal connected between said amplifier output and input, a first capacitor connected between said amplifier output and ground, and a second capacitor connected between said amplifier input and ground, for selecting the frequency of oscillation; whereby said oscillator exhibits a fast start up time when power is applied.

Claim 15

In a paging receiver including a decoder circuit for decoding information transmitted to the paging receiver, a low power, low voltage oscillator circuit connected to said decoder circuit, said oscillator circuit comprising in combination: an amplifier having an input and an output, said amplifier having a first, second and third stage, each stage having an input, an output, and an associated output current, wherein said first stage input is connected to said amplifier input, and said third stage output is connected to said amplifier output, said stages being interconnected in a cascade fashion, whereby the output of a preceding stage is connected to the input of the following stage; a feedback biasing means connected between said amplifier output and said amplifier input, for biasing said amplifier stages in their respective operating regions; and a tuned circuit means including a quartz crystal connected between said amplifier output and input, a first capacitor connected between said amplifier output and ground, and a second capacitor connected between said amplifier input and ground, for selecting the frequency of oscillation; whereby said oscillator exhibits a fast start up time when power is applied.

Claim 16

The oscillator circuit of claim 12, wherein: said first stage comprises a first NPN transistor, the base of said first NPN transistor being connected to said first stage input, the collector of said first NPN transistor being connected to said first stage output, the emitter of said first NPN transistor being connected to ground through a first resistor; said second stage comprises a PNP transist or having a first and second collector, said first collector being connected to the base of said PNP transistor, said second collector being connected to the output of said second stage, the emitter of said PNP transistor being connected to a source of positive voltage; and said third stage comprises a diode and a second NPN transistor, the anode of said diode being connected to the base of said second NPN transistor and to the input of said third stage, the cathode of said diode being connected to ground through a second resistor, the emitter of said second NPN transistor being connected to ground, and the collector of said second NPN transistor being connected to said source of positive voltage through a pair of series connected resistors, the junction of said pair of resistors being connected to said third stage output.

Claim 17

The oscillator circuit of claim 13, further comprising: an interface circuit, connected to the output of said third stage, said interface circuit having a third NPN transistor connected to said output of said third stage through a third resistor, the emitter of said third NPN transistor being connected to ground, and the collector of said third NPN transistor being connected to a second source of positive voltage through a fourth resistor, the collector of said third NPN transistor connected to the output of said interface circuit.