Data line card printed board assembly

Claim 2

A data line card printed board assembly to provide an interface between a switching system and data terminal equipment operating in a selected one of a synchronous mode, an asynchronous mode and a synchronous polled mode and at a selected one of a plurality of different data rates comprising: first means coupled to said switching system to provide a first bidirectional communication path between said switching systems and said data line card; second means coupled to said first means and said data terminal equipment to provide said first bidirectional communication path between a first of said data terminal equipment and said data line card; computer means disposed on said assembly coupled to said first and second means for bidirectional control of said first and second means to accommodate said selected one of said modes and said selected one of said plurality of different data rates; and a clock generator disposed on said assembly coupled to said first and second means responsive to a clock signal received from said switching system, wherein said first means includes first decoder means coupled to said switching system to indicate a first time period in which data is received from said switching system for said first bidirectional communication path and transmitted to said switching system from said first bidirectional communication path, first synchronous, asynchronous receiver and transmitter means coupled to an internal data bus, and first interface means coupled to said switching system, said first synchronous, asynchronous receiver and transmitter means and said first decoder means under control of said first decoder to present input data from said switching system to said internal data bus and to present output data on said first bidirectional communication path from said internal data bus to said switching system.

Claim 3

An assembly according to claim 1, wherein said second means includes second synchronous, asynchronous receiver and transmitter means coupled to said internal data bus in said first bidirectional communication path, and second interface means coupled to said first of said data terminal equipment and said second synchronous, asynchronous receiver and transmitter means to present said input data on said internal data bus in said first bidirectional communication path to said first of said data terminal equipment and to present said output data from said first of said data terminal equipment to said internal data bus.

Claim 4

An assembly according to claim 2, wherein said second means further includes first baud rate generator means coupled to said second synchronous, asynchronous receiver and transmitter means to control the flow of data therethrough.

Claim 5

An assembly according to claim 3, wherein said computer means includes a microprocessor coupled to said internal data bus and an address bus, a program read only memory coupled to said internal data bus and said address bus, a program random access memory coupled to said internal data bus and said address bus, and a data random access memory coupled to said internal data bus and said address bus to provide data rate buffering for said selected one of said plurality of different data rates.

Claim 6

An assembly according to claim 4, further including third means coupled to said switching system and said computer means to provide a second bidirectional communication path between said switching system and said data line card, said third means being controlled by said computer means; and fourth means coupled to said computer means, said third means and said data terminal equipment to provide said second bidirectional communication path between said data terminal equipment and said data line card, said fourth means being contolled by said computer means, said second bidirectional communication path being coupled to said first of said data terminal equipment to transmit and receive clocks between said data line card and said first of said data terminal equipment when said first of said data terminal equipment operates in and said computer means is programmed for a selected one of said synchronous mode and said synchronous polled mode and said second bidirectional communication path being coupled to a second of said data terminal equipment to interface said data line card to two of said data terminal equipment when both of said first and second of said data terminal equipment are operating in and said computer means is programmed for said asynchronous mode.

Claim 7

An assembly according to claim 5, further including digital logic means coupled in common to said first and third means.

Claim 8

An assembly according to claim 6, wherein said third means includes second decoder means coupled to said switching system to indicate a second time period in which data is received from said switching system for said second bidirectional communication path and transmitted to said switching system from said second bidirectional communication path, third synchronous, asyncnronous receiver and transmitter means coupled to said internal data bus, and third interface means coupled to said switching system, said third synchronous, asynchronous receiver and transmitter means and said second decoder means under control of said second decoder means to present input data from said switching system to said internal data bus and to present output data on said second bidirectional communication path from said internal data bus to said switching system.

Claim 9

An assembly according to claim 7, wherein said fourth means includes fourth synchronous, asynchronous receiver and transmitter means couple to said internal data bus in said second bidirectional communication path, and fourth interface means coupled to said data terminal equipment and said fourth synchronous, asynchronous receiver and transmitter means in said second bidirectional communication path, said fourth interface means presenting said input data in said second bidirectional communication path on said internal data bus to said second of said data terminal equipment and to present said output data on said second bidirectional communication path from said second of said data terminal equipment to said internal data bus when said first and second data terminal equipment are operating in said asynchronous mode.

Claim 10

An assembly according to claim 8, wherein said fourth means further includes second baud rate generator means coupled to said fourth synchronous, asynchronous receiver and transmitter means to control the flow of data therethrough.

Claim 11

An assembly according to claim 2, wherein said computer means includes a microprocessor coupled to said internal data bus and an address bus, a program read only memory coupled to said internal data bus and said address bus, a program random access memory coupled to said internal data bus and said address bus to provide data rate buffering for said selected one of said plurality of different data rates.

Claim 12

An assembly according to claim 10, further including third means coupled to said switching system and said computer means to provide a second bidirectional communication path between said switching system and said data line card, said third means being controlled by said computer means; and fourth means coupled to said computer means, said third means and said data terminal equipment to provide said second bidirectional communication path between said data terminal equipment and said data line card, said fourth means being contolled by said computer means, said second bidirectional communication path being coupled to said first of said data terminal equipment to transmit and receive clocks between said data line card and said first of said data terminal equipment when said first of said data terminal equipment operates in and said computer means is programmed for a selected one of said synchronous mode and said synchronous polled mode and said second bidirectional communication path being coupled to a second of said data terminal equipment to interface said data line card to two of said data terminal equipment when both of said first and second of said data terminal equipment are operating in and said computer means is programmed for said asynchronous mode.

Claim 13

An assembly according to claim 11, further including digital logic means coupled in common to said first and third means.

Claim 14

An assembly according to claim 12, wherein said third means includes second decoder means coupled to said switching system to indicate a second time period in which data is received from said switching system for said second bidirectional communication path and transmitted to said switching system from said second bidirectional communication path, third synchronous, asynchronous receiver and transmitter means coupled to said internal data bus, and third interface means coupled to said switching system, said third synchronous, asynchronous receiver and transmitter means and said second decoder means under control of said second decoder means to present input data from said switching system to said internal data bus and to present output data on said second bidirectional communication path from said internal data bus to said switching system.

Claim 15

An assembly according to claim 13, wherein said fourth means includes fourth synchronous, asynchronous receiver and transmitter means couple to said internal data bus in said second bidirectional communication path, and fourth interface means coupled to said data terminal equipment and said fourth synchronous, asynchronous receiver and transmitter means in said second bidirectional communication path, said fourth interface means presenting said input data in said second bidirectional communication path on said internal data bus to said second of said data terminal equipment and to present said output data on said second bidirectional communication path from said second of said data terminal equipment to said internal data bus when said first and second data terminal equipment are operating in said asynchronous mode.

Claim 16

An assembly according to claim 14, wherein said fourth means further includes second baud rate generator means coupled to said fourth synchronous, asynchronous receiver and transmitter means to control the flow of data therethrough.

Claim 17

A data line card printed board assembly to provide an interface between a switching system and data terminal equipment operating in a selected one of a synchronous mode, an asynchronous mode and a synchronous polled mode and at a selected one of a plurality of different data rates comprising: first means coupled to said switching system to provide a first bidirectional communication path between said switching systems and said data line card; second means coupled to said first means and said data terminal equipment to provide said first bidirectional communication path between a first of said data terminal equipment and said data line card; and computer means disposed on said assembly coupled to said first and second means for bidirectional control of said first and second means to accommodate said selected one of said modes and said selected one of said plurality of different data rates; wherein said first means includes first decoder means coupled to said switching system to indicate a first time period in which data is received from said switching system for said first bidirectional communication path and transmitted to said switching system from said first bidirectional communication path, first synchronous, asynchronous receiver and transmitter means coupled to an internal data bus, and first interface means coupled to said switching system, said first synchronous, asynchronous receiver and transmitter means and said first decoder means under control of said first decoder to present input data from said switching system to said internal data bus and to present output data on said first bidirectional communication path from said internal data bus to said switching system.

Claim 18

A data line card printed board assembly to provide an interface between a switching system and data terminal equipment operating in a selected one of a synchronous mode, an asynchronous mode and a synchronous polled mode and at a selected one of a plurality of different data rates comprising: first means coupled to said switching system to provide a first bidirectional communication path between said switching systems and said data line card; second means coupled to said first means and said data terminal equipment to provide said first bidirectional communication path between a first of said data terminal equipment and said data line card; and computer means disposed on said assembly coupled to said first and second means for bidirectional control of said first and second means to accommodate said selected one of said modes and said selected one of said plurality of different data rates; wherein said first means includes first decoder means coupled to said switching system to indicate a first time period in which data is received from said switching system for said first bidirectional communication path and transmitted to said switching system from said first bidirectional communication path, first synchronous, asynchronous receiver and transmitter means coupled to an internal data bus, and first interface means coupled to said switching system, said first synchronous, asynchronous receiver and transmitter means and said first decoder means under control of said first decoder to present input data from said switching system to said internal data bus and to present output data on said first bidirectional communication path from said internal data bus to said switching system.

Claim 19

An assembly according to claim 16, wherein said second means includes second synchronous, asynchronous receiver and transmitter means coupled to said internal data bus in said first bidirectional communication path, and second interface means coupled to said first of said data terminal equipment and said second synchronous, asynchronous receiver and transmitter means to present said input data on said internal data bus in said first bidirectional communication path to said first of said data terminal equipment and to present said output data from said first of said data terminal equipment to said internal data bus.

Claim 20

An assembly according to claim 16, wherein said second means further includes first baud rate generator means coupled to said second synchronous, asynchronous receiver and transmitter means to control the flow of data therethrough.

Claim 21

An assembly according to claim 18, wherein said computer means includes a microprocessor coupled to said internal data bus and an address bus, a program read only memory coupled to said internal data bus and said address bus, a program random access memory coupled to said internal data bus and said address bus, and a data random access memory coupled to said internal data bus and said address bus to provide data rate buffering for said selected one of said plurality of different data rates.

Claim 22

An assembly according to claim 19, further including third means coupled to said switching system and said computer means to provide a second bidirectional communication path between said switching system and said data line card, said third means being controlled by said computer means; and fourth means coupled to said computer means, said third means and said data terminal equipment to provide said second bidirectional communication path between said data terminal equipment and said data line card, said fourth means being contolled by said computer means, said second bidirectional communication path being coupled to said first of said data terminal equipment to transmit and receive clocks between said data line card and said first of said data terminal equipment when said first of said data terminal equipment operates in and said computer means is programmed for a selected one of said synchronous mode and said synchronous polled mode and said second bidirectional communication path being coupled to a second of said data terminal equipment to interface said data line card to two of said data terminal equipment when both of said first and second of said data terminal equipment are operating in and said computer means is programmed for said asynchronous mode.

Claim 23

An assembly according to claim 20, further including digital logic means coupled in common to said first and third means.

Claim 24

An assembly according to claim 21, wherein said third means includes second decoder means coupled to said switching system to indicate a second time period in which data is received from said switching system for said second bidirectional communication path and transmitted to said switching system from said second bidirectional communication path, third synchronous, asynchronous receiver and transmitter means coupled to said internal data bus, and third interface means coupled to said switching system, said third synchronous, asynchronous receiver and transmitter means and said second decoder means under control of said second decoder means to present input data from said switching system to said internal data bus and to present output data on said second bidirectional communication path from said internal data bus to said switching system.

Claim 25

An assembly according to claim 22, wherein said fourth means includes fourth synchronous, asynchronous receiver and transmitter means couple to said internal data bus in said second bidirectional communication path, and fourth interface means coupled to said data terminal equipment and said fourth synchronous, asynchronous receiver and transmitter means in said second bidirectional communication path, said fourth interface means presenting said input data in said second bidirectional communication path on said internal data bus to said second of said data terminal equipment and to present said output data on said second bidirectional communication path from said second of said data terminal equipment to said internal data bus when said first and second data terminal equipment are operating in said asynchronous mode.

Claim 26

An assembly according to claim 23, wherein said fourth means further includes second baud rate generator means coupled to said fourth synchronous, asynchronous receiver and transmitter means to control the flow of data therethrough.

Claim 27

An assembly according to claim 17, wherein said computer means includes a microprocessor coupled to said internal data bus and an address bus, a program read only memory coupled to said internal data bus and said address bus, a program random access memory coupled to said internal data bus and said address bus, and a data random access memory coupled to said internal data bus and said address bus to provide data rate buffering for said selected one of said plurality of different data rates.

Claim 28

An assembly according to claim 25, further including third means coupled to said switching system and said computer means to provide a second bidirectional communication path between said switching system and said data line card, said third means being controlled by said computer means; and fourth means coupled to said computer means, said third means and said data terminal equipment to provide said second bidirectional communication path between said data terminal equipment and said data line card, said fourth means being contolled by said computer means, said second bidirectional communication path being coupled to said first of said data terminal equipment to transmit and receive clocks between said data line card and said first of said data terminal equipment when said first of said data terminal equipment operates in and said computer means is programmed for a selected one of said synchronous mode and said synchronous polled mode and said second bidirectional communication path being coupled to a second of said data terminal equipment to interface said data line card to two of said data terminal equipment when both of said first and second of said data terminal equipment are operating in and said computer means is programmed for said asynchronous mode.

Claim 29

An assembly according to claim 26, further including digital logic means coupled in common to said first and third means.

Claim 30

An assembly according to claim 27, wherein said third means includes second decoder means coupled to said switching system to indicate a second time period in which data is received from said switching system for said second bidirectional communication path and transmitted to said switching system from said second bidirectional communication path, third synchronous, asynchronous receiver and transmitter means coupled to said internal data bus, and third interface means coupled to said switching system, said third synchronous, asynchronous receiver and transmitter means and said second decoder means under control of said second decoder means to present input data from said switching system to said internal data bus and to present output data on said second bidirectional communication path from said internal data bus to said switching system.

Claim 31

An assembly according to claim 28, wherein said fourth means includes fourth synchronous, asynchronous receiver and transmitter means couple to said internal data bus in said second bidirectional communication path, and fourth interface means coupled to said data terminal equipment and said fourth synchronous, asynchronous receiver and transmitter means in said second bidirectional communication path, said fourth interface means presenting said input data in said second bidirectional communication path on said internal data bus to said second of said data terminal equipment and to present said output data on said second bidirectional communication path from said second of said data terminal equipment to said internal data bus when said first and second data terminal equipment are operating in said asynchronous mode.

Claim 32

An assembly according to claim 29, wherein said fourth means further includes second baud rate generator means coupled to said fourth synchronous, asynchronous receiver and transmitter means to control the flow of data therethrough.

Claim 33

A data line card printed board assembly to provide an interface between a switching system and data terminal equipment operating in a selected one of a synchronous mode, an asynchronous mode and a synchronous polled mode and at a selected one of a plurality of different data rates comprising: first means coupled to said switching system to provide a first bidirectional communication path between said switching systems and said data line card; second means coupled to said first means and said data terminal equipment to provide said first bidirectional communication path between a first of said data terminal equipment and said data line card; and computer means disposed on said assembly coupled to said first and second means for bidirectional control of said first and second means to accommodate said selected one of said modes and said selected one of said plurality of different data rates; wherein said first means includes first synchronous, asynchronous receiver and transmitter means coupled to an internal data bus in said first bidirectional communication path, and first interface means coupled to said first of said data terminal equipment and said synchronous, asynchronous receiver and transmitter means to present input data on said internal data bus to said first of said data terminal equipment and to present output data from said first of said data terminal equipment to said internal data bus.

Claim 34

A data line card printed board assembly to provide an interface between a switching system and data terminal equipment operating in a selected one of a synchronous mode, an asynchronous mode and a synchronous polled mode and at a selected one of a plurality of different data rates comprising: first means coupled to said switching system to provide a first bidirectional communication path between said switching systems and said data line card; second means coupled to said first means and said data terminal equipment to provide said first bidirectional communication path between a first of said data terminal equipment and said data line card; and computer means disposed on said assembly coupled to said first and second means for bidirectional control of said first and second means to accommodate said selected one of said modes and said selected one of said plurality of different data rates; wherein said first means includes first synchronous, asynchronous receiver and transmitter means coupled to an internal data bus in said first bidirectional communication path, and first interface means coupled to said first of said data terminal equipment and said synchronous, asynchronous receiver and transmitter means to present input data on said internal data bus to said first of said data terminal equipment and to present output data from said first of said data terminal equipment to said internal data bus.

Claim 35

An assembly according to claim 31, further including third means coupled to said switching system and said computer means to provide a second bidirectional communication path between said switching system and said data line card, said third means being controlled by said computer means; and fourth means coupled to said computer means, said third means and said data terminal equipment to provide said second bidirectional communication path between said data terminal equipment and said data line card, said fourth means being contolled by said computer means, said second bidirectional communication path being coupled to said first of said data terminal equipment to transmit and receive clocks between said data line card and said first of said data terminal equipment when said first of said data terminal equipment operates in and said computer means is programmed for a selected one of said synchronous mode and said synchronous polled mode and said second bidirectional communication path being coupled to a second of said data terminal equipment to interface said data line card to two of said data terminal equipment when both of said first and second of said data terminal equipment are operating in and said computer means is programmed for said asynchronous mode.

Claim 36

An assembly according to claim 32, wherein said third means includes decoder means coupled to said switching system to indicate a time period in which data is received from said switching system for said second bidirectional communication path and transmitted to said switching system from said second bidirectional communication path, second synchronous, asynchronous receiver and transmitter means coupled to an internal data bus, and second interface means coupled to said switching system, said second synchronous, asynchronous receiver and transmitter means and said decoder means under control of said decoder means to present input data from said switching system to said internal data bus and to present output data on said second bidirectional communication path from said internal data bus to said switching system.

Claim 37

An assembly according to claim 33, wherein said fourth means includes third synchronous, asynchronous receiver and transmitter means coupled to said internal data bus in said second bidirectional communication path, and third interface means coupled to said data terminal equipment and said third synchronous, asynchronous reeivr and trnsmitter means in said second bidirectional communication path, said third interface means presenting said input data in said second bidirectional communication path on said internal data bus to said second of said data terminal equipment and to present said output data on said second bidirectional communication path from said second of said data terminal equipment to said internal data bus when said first and second data terminal equipment are operating in said asynchronous mode.

Claim 38

An assembly to claim 34, wherein said fourth means further includes baud rate generator means coupled to said third synchronous, asynchronous receiver and transmitter means to control the flow of data therethrough.

Claim 39

An assembly according to claim 32, further including digital logic means coupled in common to said first and third means.

Claim 40

A data line card printed board assembly to provide an interface between a switching system and data terminal equipment operating in a selected one of a synchronous mode, an asynchronous mode and a synchronous polled mode and at a selected one of a plurality of different data rates comprising: first means coupled to said switching system to provide a first bidirectional communication path between said switching systems and said data line card; second means coupled to said first means and said data terminal equipment to provide said first bidirectional communication path between a first of said data terminal equipment and said data line card; and computer means disposed on said assembly coupled to said first and second means for bidirectional control of said first and second means to accomodate said selected one of said modes and said selected one of said plurality of different data rates; wherein said computer means includes a microprocessor coupled to an internal bus and an address bus, a program read only memory coupled to said internal data bus and said address bus, a program random access memory coupled to said internal data bus and said address bus, and a data random access memory coupled to said internal data bus and said address bus to provide data rate buffering for said selected one of said plurality of different data rates.

Claim 41

A data line card printed board assembly to provide an interface between a switching system and data terminal equipment operating in a selected one of a synchronous mode, an asynchronous mode and a synchronous polled mode and at a selected one of a plurality of different data rates comprising: first means coupled to said switching system to provide a first bidirectional communication path between said switching systems and said data line card; second means coupled to said first means and said data terminal equipment to provide said first bidirectional communication path between a first of said data terminal equipment and said data line card; and computer means disposed on said assembly coupled to said first and second means for bidirectional control of said first and second means to accomodate said selected one of said modes and said selected one of said plurality of different data rates; wherein said computer means includes a microprocessor coupled to an internal bus and an address bus, a program read only memory coupled to said internal data bus and said address bus, a program random access memory coupled to said internal data bus and said address bus, and a data random access memory coupled to said internal data bus and said address bus to provide data rate buffering for said selected one of said plurality of different data rates.

Claim 42

A data line card printed board assembly to provide an interface between a switching system and data terminal equipment operating in a selected one of a synchronous mode, an asynchronous mode and a synchronous polled mode and at a selected one of a plurality of different data rates comprising: first means coupled to said switching system to provide a first bidirectional communication path between said switching systems and said data line card; second means coupled to said first means and said data terminal equipment to provide said first bidirectional communication path between a first of said data terminal euqipment and said data line card; computer means disposed on said assembly coupled to said first and second means for bidirectional control of said first and second means to accommodate said selected one of said modes and said selected one of said plurality of different data rates; third means coupled to said switching system and said computer means to provide a second bidirectional communication path between said switching system and said data line card, said third means being controlled by said computer means; and fourth means coupled to said computer means, said third means and said data terminal equipment to provide said second bidirectional communication path between said data terminal equipment and said data line card, said fourth means being controlled by said computer means, said second bidirectional communication path being coupled to said first of said data terminal equipment to transmit and receive clocks between said data line card and said first of said data terminal when said first of said data terminal equipment operates in and said computer means is programmed for a selected one of said synchronous mode and said synchronous polled mode and said second bidirectional communication path being coupled to a second of said data terminal equipment to interface said data line card to two of said data terminal equipment when both of said first and second of said data terminal equipment are operating in and said computer means is programmed for said asynchronous mode.

Claim 43

A data line card printed board assembly to provide an interface between a switching system and data terminal equipment operating in a selected one of a synchronous mode, an asynchronous mode and a synchronous polled mode and at a selected one of a plurality of different data rates comprising: first means coupled to said switching system to provide a first bidirectional communication path between said switching systems and said data line card; second means coupled to said first means and said data terminal equipment to provide said first bidirectional communication path between a first of said data terminal euqipment and said data line card; computer means disposed on said assembly coupled to said first and second means for bidirectional control of said first and second means to accommodate said selected one of said modes and said selected one of said plurality of different data rates; third means coupled to said switching system and said computer means to provide a second bidirectional communication path between said switching system and said data line card, said third means being controlled by said computer means; and fourth means coupled to said computer means, said third means and said data terminal equipment to provide said second bidirectional communication path between said data terminal equipment and said data line card, said fourth means being controlled by said computer means, said second bidirectional communication path being coupled to said first of said data terminal equipment to transmit and receive clocks between said data line card and said first of said data terminal when said first of said data terminal equipment operates in and said computer means is programmed for a selected one of said synchronous mode and said synchronous polled mode and said second bidirectional communication path being coupled to a second of said data terminal equipment to interface said data line card to two of said data terminal equipment when both of said first and second of said data terminal equipment are operating in and said computer means is programmed for said asynchronous mode.

Claim 44

An assembly according to claim 38, wherein said third means includes decoder means coupled to said switching system to indicate a time period in which data is received from said switching system for said second bidirectional communication path and transmitted to said switching system from said second bidirectional communication path, first synchronous, asynchronous receiver and transmitter means coupled to an internal data bus, and first interface means coupled to said switching system, said first synchronous, asynchronous receiver and transmitter means and said decoder means under control of said decoder means to present input data from said switching system to said internal data bus and to present output data on said second bidirectional communication path from said internal data bus to said switching system.

Claim 45

An assembly according to claim 39, wherein said fourth means includes second synchronous, asynchronous receiver and transmitter means coupled to said internal data bus in said second bidirectional communication path, and second interface means coupled to said data terminal equipment and said second synchronous, asynchronous receiver and transmitter means in said second bidirectional communication path, said second interface means presenting said input data in said second bidirectional communication path on said internal data bus to said second of said data terminal equipment and to present said output data on said second bidirectional communication path from said second of said data terminal equipment to said internal data bus when said first and second data terminal equipment are operating in said asynchronous mode.

Claim 46

An assembly according to claim 40, wherein said fourth mean further includes baud rate generator means coupled to said second synchronous, asynchronous receiver and transmitter means to control the flow of data therethrough.

Claim 47

An assembly according to claim 39, further including digital logic means coupled in common to said first and third means.