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US4584694A Expired / Lapsed US ⏱️ 0.0 years remaining

Method and apparatus for estimating baud rate

Assignee: RCA Corp
•
Filing: 1984-07-19
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Granted: 1986-04-22
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Expires: 2004-07-19
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Abstract

Abstract The baud rate of a digital signal is estimated using a method based on a mean squared error determination. The disclosed method fits a sine wave curve to the digital signal and varies its frequency until the mean squared error is a minimum, wherein the error is defined as the distance of the sine wave curve from its center line at each transition of the digital signal. The disclosure includes an apparatus for carrying out the method of the invention. In addition, the method is suitable for execution as a stored program within a high-speed signal processor.

Inventors

  • 👤 Constantine Gumacos

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 15:06
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/02; H04L25/0262; H04L7/00; H04L7/02; H04L7/033

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 77 words
A method for estimating the baud rate, f, of a digital signal having high-to-low and low-to-high transitions, said method comprising the steps of: a. detecting the zero-crossings of said high-to-low and low-to-high transitions of said digital signal; b. measuring the times of occurrence, T(1), T(2), . . . T(N), of the detected zero-crossings of N successive transitions of said digital signal; and c. determining a value of f for which the expression ##EQU16## assumes a maximum value.
Claim 2
Independent Claim 77 words
A method for estimating the baud rate, f, of a digital signal having high-to-low and low-to-high transitions, said method comprising the steps of: a. detecting the zero-crossings of said high-to-low and low-to-high transitions of said digital signal; b. measuring the times of occurrence, T(1), T(2), . . . T(N), of the detected zero-crossings of N successive transitions of said digital signal; and c. determining a value of f for which the expression ##EQU16## assumes a maximum value.
Claim 3
Dependent Claim 119 words
The method according to claim 1 wherein said determining step includes the following substeps: (1) selecting a current value of f; (2) computing a current value of said expression using said current value of f; (3) comparing said current value of said expression with a previously computed maximum value of said expression and, if said current value of said expression exceeds said previously computed maximum value, replacing said previously computed maximum value with said current value of said expression; (4) augmenting said value of f by a predetermined increment; and (5) repeating substeps (2) through (4) using said augmented value of f as said current value of f until said augmented value of f exceeds a predetermined maximum value.
Claim 4
Dependent Claim 19 words
The method according to claim 2 wherein said current value of f is selected in substep (1) as f=(N-1)/2[T(N)-T(1)].
Claim 5
Dependent Claim 16 words
The method according to claim 2 wherein said predetermined increment of said augmenting substep is 1/8T(N).
Claim 6
Dependent Claim 74 words
The method according to claim 2 further including the following substep: (6) repeating substeps (1) through (5) wherein said selected current value of f assumes the value of f which preceded the value of f for which said expression assumed said maximum value; said predetermined maximum value of f assumes the value of f which followed the value of f for which said expression assumed said maximum value; and said predetermined increment is reduced.
Claim 7
Dependent Claim 16 words
The method according to claim 5 wherein the reduction factor of said predetermined increment is one-tenth.
Claim 8
Independent Claim 104 words
An apparatus for estimating the baud rate, f, of a digital signal having high-to-low and low-to-high transitions, said apparatus comprising: means for providing clock signals; means for measuring the times of occurrence, T(1), T(2), . . . , T(N), of N successive transitions of said digital signal, said measuring means including means coupled to said clock signal for detecting when said digital signal crosses a predetermined threshold level, and for generating information representative of the times of said crossings of said threshold level by said digital signal; and means for determining a value of f for which the expression ##EQU17## assumes a maximum value.
Claim 9
Independent Claim 104 words
An apparatus for estimating the baud rate, f, of a digital signal having high-to-low and low-to-high transitions, said apparatus comprising: means for providing clock signals; means for measuring the times of occurrence, T(1), T(2), . . . , T(N), of N successive transitions of said digital signal, said measuring means including means coupled to said clock signal for detecting when said digital signal crosses a predetermined threshold level, and for generating information representative of the times of said crossings of said threshold level by said digital signal; and means for determining a value of f for which the expression ##EQU17## assumes a maximum value.
Claim 10
Dependent Claim 26 words
The apparatus according to claim 7 further including means coupled to said detecting means for counting said crossings of said threshold level by said digital signal.
Claim 11
Dependent Claim 56 words
The apparatus according to claim 7 wherein said determining means includes first and second addressable memories having address input terminals and data output terminals, said first and second memories providing at said data output terminals digital information representative of the sine and cosine functions, respectively, of digital representations of angles applied to said address input terminals.
Claim 12
Dependent Claim 39 words
The apparatus according to claim 7 wherein said determining means includes means for comparing the value of said expression obtained for a first value of f with the value of said expression obtained for a second value of f.
Claim 13
Dependent Claim 37 words
The apparatus according to claim 10 further including means responsive to said comparing means for storing, from between said first and second values of f, that value of f for which said expression assumes a greater value.
Claim 14
Dependent Claim 17 words
The apparatus according to claim 11 further including means for storing said greater value of said expression.
Claim 15
Dependent Claim 23 words
The apparatus according to claim 7 further including a shift register for storing digital representations of T(1), T(2), . . . , T(N).

References Cited (Backward Citations)

US4484291A Cited
US4453550A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-04-21 1989-10-21 1990-04-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-04-21 1993-10-21 1994-04-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-04-21 1997-10-21 1998-04-22 $7700.00 Window Closed / Lapsed

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