Sector mark decoder for an optical recorder

Claim 1

Apparatus for using differential detection in decoding of sector marks comprising a plurality of marks recorded on an optical recording apparatus, comprising a sector mark comprising a plurality of marks recorded on an optical recording apparatus in a sector field having a first predetermined number of positions divisible into a second predetermined number of sections, the marks being recorded in a plurality of groups, each group having the marks evenly spaced from each other, the marks of half the groups recorded on the rising edge of a prerecorded clock, the marks of the other half of the groups recorded on the falling edge of said prerecorded clock, the position number, modulus said second predetermined number, of the marks of each group being different from the others; a CK clock having the frequency of said prerecorded clock; an HCK clock having half the frequency of said prerecorded clock, wherein the initial state of said HCK clock relative to said CK clock is indeterminate; flip flop means responsive to said CK and said HCK clocks for generating a pair of signals indicative of the state of said clocks; a pair of sample and hold cells responsive to read signals from an apparatus reading data from said optical recording apparatus; means responsive to said pair of signals for triggering a first of said sample and hold cells at every field position having a first position number, modulus said second predetermined number; means responsive to said pair of signals for triggering a second of said sample and hold cells at the every field position having a first position number plus one, modulus said second predetermined number; comparator means for comparing the first sample and hold cell value with the second sample and hold cell value and for generating a comparator output indicative of the results of the comparison; means responsive to said pair of signals and to said comparator means for retaining the value in the sample and hold cell having the higher value and for triggering the other sample and hold cell at the next position number and for repeating said retention and said triggering of the other sample and hold cell at the occurrence of every position number until, but excluding, the next first position number, modulus said second predetermined number; address register means responsive to a change in the state of said comparator output and to said flip flop means for recording said pair of signals indicative of the states of said CK and said HCK clocks; sync register means for recording the state of said address register means after every first position number, modulus said second predetermined number; decoder means responsive to one of said pairs of signals responsive to said HCK clock and further responsive to said sync register means for comparing the state of said pair of signals indicative of the state of said CK and said HCK clocks with a set of predetermined signal states as indexed by a count and for incrementing the count if there is a match and for resetting the count if there is no match, including means for incrementing the count when the state of the pair of signals may be indeterminate; said decoder means further including means responsive to the count for issuing a sync pulse when the count reaches a predetermined count.