Current overload protected solid state relay

Claim 2

An electronic control circuit having input and output terminals, comprising: a metal oxide semiconductor field-effect transistor (MOSFET) having a gate terminal and drain and source terminals; means for connecting the drain and source terminals to the output terminal; bias means for providing a bias signal in response to the application of an input signal to the circuit; means for connecting the bias means to the gate and source terminals of the MOSFET so that the bias signal serves to bias the MOSFET into conduction when the level of current flowing through the MOSFET exceeds a predetermined value; detector means for providing an indication of the level of current flowing through the MOSFET; shunt means responsive to the detector means for shunting the bias signal when the level of current flowing through the MOSFET exceeds a predetermined value; and where the shunt means includes a transistor having base, emitter and collector terminals, and means for connecting the emitter and collector terminals to the source and gate terminals, respectively, of the MOSFET; the detector means includes a first resistor and means for connecting the first resistor between the drain terminal of the MOSFET and the base terminal of the transistor, and delay means for delaying the application of current flowing through the first resistor to the base terminal of the transistor, the delay means including a junction field-effect transistor (JFET) having source, drain and gate terminals, means for connecting the drain terminal to the base terminal of the transistor, means for connecting the source terminal to the emitter terminal of the transistor, a second resistor, means for connecting the second resistor between the gate terminal of the MOSFET and the gate terminal of the JFET, a capacitor, and means for connecting the capacitor between the gate and source terminals of the JFET.

Claim 3

An electronic control circuit having input and output terminals, comprising: a metal oxide semiconductor field-effect transistor (MOSFET) having a gate terminal and drain and source terminals; means for connecting the drain and source terminals to the output terminal; bias means for providing a bias signal in response to the application of an input signal to the circuit; means for connecting the bias means to the gate and source terminals of the MOSFET so that the bias signal serves to bias the MOSFET into conduction when the level of current flowing through the MOSFET exceeds a predetermined value; detector means for providing an indication of the level of current flowing through the MOSFET; shunt means responsive to the detector means for shunting the bias signal when the level of current flowing through the MOSFET exceeds a predetermined value; and where the shunt means includes a transistor having base, emitter and collector terminals, and means for connecting the emitter and collector terminals to the source and gate terminals, respectively, of the MOSFET; the detector means includes a first resistor and means for connecting the first resistor between the drain terminal of the MOSFET and the base terminal of the transistor, and delay means for delaying the application of current flowing through the first resistor to the base terminal of the transistor, and in which the detector means further includes a second resistor, and means for connecting the second resistor between the base and emitter terminals of the transistor; the means for connecting the first resistor includes a second MOSFET, and means for connecting the second MOSFET between the first resistor and the base terminal of the transistor; and the delay means includes a series circuit comprising a third resistor and a capacitor, means for connecting the series circuit between the gate and source terminals of the first MOSFET, and means for connecting the gate terminal of the second MOSFET to the junction between the third resistor and the capacitor.

Claim 4

An electronic control circuit having input and output terminals, comprising: a metal oxide semiconductor field-effect transistor (MOSFET) having a gate terminal and drain and source terminals; means for connecting the drain and source terminals to the output terminal; bias means for providing a bias signal in response to the application of an input signal to the circuit; means for connecting the bias means to the gate and source terminals of the MOSFET so that the bias signal serves to bias the MOSFET into conduction when the level of current flowing through the MOSFET exceeds a predetermined value; detector means for providing an indication of the level of current flowing through the MOSFET; shunt means responsive to the detector means for shunting the bias signal when the level of current flowing through the MOSFET exceeds a predetermined value; and where the shunt means includes a transistor having base, emitter and collector terminals, and means for connecting the emitter and collector terminals to the source and gate terminals, respectively, of the MOSFET; the detector means includes a first resistor and means for connecting the first resistor between the drain terminal of the MOSFET and the base terminal of the transistor, and delay means for delaying the application of current flowing through the first resistor to the base terminal of the transistor, and in which the detector means further includes a second resistor, and means for connecting the second resistor between the base and emitter terminals of the transistor; the means for connecting the first resistor includes a second MOSFET, and means for connecting the second MOSFET between the first resistor and the base terminal of the transistor; and the delay means includes a series circuit comprising a third resistor and a capacitor, means for connecting the series circuit between the gate and source terminals of the first MOSFET, and means for connecting the gate terminal of the second MOSFET to the junction between the third resistor and the capacitor.

Claim 5

An electronic control circuit having input and output terminals, comprising: a metal oxide semiconductor field-effect transistor (MOSFET) having a gate terminal and drain and source terminals; means for connecting the drain and source terminals to the output terminal; bias means for providing a bias signal in response to the application of an input signal to the circuit; means for connecting the bias means to the gate and source terminals of the MOSFET so that the bias signal serves to bias the MOSFET into conduction when the level of current flowing through the MOSFET exceeds a predetermined value; detector means for providing an indication of the level of current flowing through the MOSFET; shunt means responsive to the detector means for shunting the bias signal when the level of current flowing through the MOSFET exceeds a predetermined value; and further including a second MOSFET, means for connecting the second MOSFET between the source terminal of the first MOSFET and one output terminal, the drain terminal of the second MOSFET is connected to the one output terminal, and the source terminals of the first and second MOSFET's are connected together; where the detector means further detects when the current flowing through either MOSFET exceeds the predetermined value and generates the shutdown signal in response thereto, and in which the shunt means includes a transistor having base, emitter and collector terminals, means for connecting the emitter and collector terminals to the source and gate terminals, respectively, of the first and second MOSFET's, a resistor, and means for connecting one end of the resistor to the drain terminals of the first and second MOSFET's and the other end of the resistor to the base terminal of the transistor, including first and second diodes, means for connecting the anode terminals of the first and second diodes to the drain terminals of the first and second MOSFET's, respectively, and means for connecting the cathode terminals of the first and second diodes to the one end of the resistor.

Claim 6

An electronic control circuit having input and output terminals, comprising: a metal oxide semiconductor field-effect transistor (MOSFET) having a gate terminal and drain and source terminals; means for connecting the drain and source terminals to the output terminal; bias means for providing a bias signal in response to the application of an input signal to the circuit; means for connecting the bias means to the gate and source terminals of the MOSFET so that the bias signal serves to bias the MOSFET into conduction when the level of current flowing through the MOSFET exceeds a predetermined value; detector means for providing an indication of the level of current flowing through the MOSFET; shunt means responsive to the detector means for shunting the bias signal when the level of current flowing through the MOSFET exceeds a predetermined value; and further including a second MOSFET, means for connecting the second MOSFET between the source terminal of the first MOSFET and one output terminal, the drain terminal of the second MOSFET is connected to the one output terminal, and the source terminals of the first and second MOSFET's are connected together; where the detector means further detects when the current flowing through either MOSFET exceeds the predetermined value and generates the shutdown signal in response thereto, and in which the shunt means includes a transistor having base, emitter and collector terminals, means for connecting the emitter and collector terminals to the source and gate terminals, respectively, of the first and second MOSFET's, a resistor, and means for connecting one end of the resistor to the drain terminals of the first and second MOSFET's and the other end of the resistor to the base terminal of the transistor, including first and second diodes, means for connecting the anode terminals of the first and second diodes to the drain terminals of the first and second MOSFET's, respectively, and means for connecting the cathode terminals of the first and second diodes to the one end of the resistor.