US4580177A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Switching circuit for AC bias signal
Assignee: Toshiba Corp
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Filing: 1984-03-06
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Granted: 1986-04-01
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Expires: 2004-03-06
Abstract
Abstract A switching circuit for AC bias signal has an input terminal for inputting an input signal into the switching circuit and a first transistor connected to the emitter of the input terminal. A second transistor is connected at the collector to the collector of the first transistor. The emitter area of the second transistor is larger than that of the first transistor so that the dynamic resistances of the these transistors are equal to each other when these resistors are ON state. The emitter of the second transistor is connected to the reference voltage terminal supplied with ground voltage. The first and second transistors are controlled in conduction by a control signal as input.
Inventors
- 👤 Hideaki Ito
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 15:28
CPC Classifications
G; G11; G11B; G11B5/00; G11B5/02; G11B5/027; G11B5/03
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
133 words
A switching circuit for AC bias signal comprising: an input terminal applied with an input signal; a first transistor connected at the emitter to said input terminal; a second transistor connected at the collector to the collector of said first transistor and having an emitter area larger than that of said first transistor so that a dynamic resistance is substantially equal to that of said first transistor when said first and second transistors are ON state; a reference voltage terminal connected to the emitter of said second transistor and applied with a reference voltage; a control signal inputting means for inputting a control signal; and base current feeding means for feeding a base current to the bases of said first and second transistors according to said control signal input by said inputting means.
Claim 2
Dependent Claim
133 words
A switching circuit for AC bias signal comprising: an input terminal applied with an input signal; a first transistor connected at the emitter to said input terminal; a second transistor connected at the collector to the collector of said first transistor and having an emitter area larger than that of said first transistor so that a dynamic resistance is substantially equal to that of said first transistor when said first and second transistors are ON state; a reference voltage terminal connected to the emitter of said second transistor and applied with a reference voltage; a control signal inputting means for inputting a control signal; and base current feeding means for feeding a base current to the bases of said first and second transistors according to said control signal input by said inputting means.
Claim 3
Dependent Claim
45 words
A switching circuit for AC bias signal according to claim 1, in which said emitter area of said second transistor is substantially two times that of said first transistor, and said base current feeding means feeds substantially equally currents to said first and second transistors.
Claim 4
Dependent Claim
132 words
A switching circuit for AC bias signal according to claim 1, in which said base current feeding means further includes a power source terminal supplied with a power voltage, a third transistor for feeding the base current to the base of said first transistor in response to said control signal input by said control signal inputting means, said third transistor being connected at the collector to the base of said first transistor and the emitter thereof applied power source voltage via a resistor, and a fourth transistor for feeding the base current to the base of said second transistor in response to said control signal, said fourth transistor being connected at the collector to the base of said second transistor and at the emitter to said power source terminal via a resistor.
References Cited (Backward Citations)
US4342006A
Cited
US4510459A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-03-31 | 1989-09-30 | 1990-04-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-03-31 | 1993-09-30 | 1994-04-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-03-31 | 1997-09-30 | 1998-04-01 | $7700.00 | Window Closed / Lapsed |