US4577336A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Integrable frequency divider circuit having a feedback controlled differential amplifier as its preamplifier circuit
Assignee: Siemens AG
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Filing: 1985-05-20
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Granted: 1986-03-18
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Expires: 2005-05-20
Abstract
Abstract Integrable frequency divider circuit, including a preamplifier in the form of a differential amplifier having a signal input for receiving signals to be processed, a reference input and two outputs, a frequency divider having divider stages including a first divider stage, each being in the form of identical series-connected flip-flop cells, the first divider stage having two inputs each being connected to a respective one of the two outputs of the differential amplifier for receiving the signals to be processed, an operational amplifier having an output directly connected to the reference input of the differential amplifier and having two inputs, two resistors each being connected between a respective one of the inputs of the operational amplifier and a respective one of the outputs of the differential amplifier, a capacitor connected between the inputs of the operational amplifier, and another capacitor connected between the output of the operational amplifier and reference potential.
Inventors
- 👤 Hans Kriedt
- 👤 Josef Fenk
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 23:36
CPC Classifications
H; H03; H03K; H03K21/00; H03K21/02; H03K5/00; H03K5/01; H03K5/02
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
144 words
Integrable frequency divider circuit, comprising a preamplifier in the form of a differential amplifier having at least one stage and having a signal input for receiving signals to be processed, a reference input and two outputs, a frequency divider having divider stages including a first divider stage, each being in the form of identical series-connected flip-flop cells, said first divider stage having two inputs each being connected to a respective one of said two outputs of said differential amplifier for receiving the signals to be processed, an operational amplifier having an output directly connected to said reference input of said differential amplifier and having two inputs, two resistors each being connected between a respective one of said inputs of said operational amplifier and a respective one of said outputs of said differential amplifier, and a capacitor connected between said inputs of said operational amplifier.
Claim 2
Dependent Claim
144 words
Integrable frequency divider circuit, comprising a preamplifier in the form of a differential amplifier having at least one stage and having a signal input for receiving signals to be processed, a reference input and two outputs, a frequency divider having divider stages including a first divider stage, each being in the form of identical series-connected flip-flop cells, said first divider stage having two inputs each being connected to a respective one of said two outputs of said differential amplifier for receiving the signals to be processed, an operational amplifier having an output directly connected to said reference input of said differential amplifier and having two inputs, two resistors each being connected between a respective one of said inputs of said operational amplifier and a respective one of said outputs of said differential amplifier, and a capacitor connected between said inputs of said operational amplifier.
Claim 3
Dependent Claim
21 words
Frequency divider circuit according to claim 1, including another capacitor connected between the output of the operational amplifier and ground potential.
Claim 4
Dependent Claim
51 words
Frequency divider circuit according to claim 2, including a series circuit of two further resistors being connected between said signal input and the output of said operational amplifier, said two further resistors having a divider tap disposed therebetween carrying the reference potential for addressing said reference input of said differential amplifier.
Claim 5
Dependent Claim
25 words
Frequency divider circuit according to claim 1, including at least one further resistor connected between said signal input and reference input of said differential amplifier.
Claim 6
Dependent Claim
32 words
Frequency divider circuit according to claim 1, further comprising a second differential amplifier having inputs connected to said differential amplifier for control and for addressing said operational amplifier and said frequency divider.
Claim 7
Dependent Claim
113 words
Frequency divider circuit according to claim 5, including two emitter follower transistors having their inputs connected to said outputs of said differential amplifier and being operated in an emitter follower circuit, and a first pair of additional resistors, each of said emitter follower transistors being connected at its base to a respective output of said second differential amplifier and each of said emitter follower transistors having an emitter being connected through one of said additional resistors to a respective one of said inputs of said operational amplifier, for addressing a respective one of said inputs of said operational amplifiers and for addressing a respective one of said inputs of said first divider stage.
Claim 8
Dependent Claim
124 words
Frequency divider circuit according to claim 1, including two emitter follower transistors having their inputs connected to said outputs of said differential amplifier and being operated in an emitter follower circuit, a first pair of additional resistors and two additional transistors forming a second differential amplifier stage, each of said emitter follower transistors being connected at its base to a respective one of said outputs of said differential amplifier and each of said emitter follower transistors having an emitter being connected through one of said additional resistors to a respective one of said inputs of said operational amplifier, for addressing a respective one of said inputs of said operational amplifier and for addressing a respective one of said inputs of said first divider stage.
Claim 9
Dependent Claim
32 words
A frequency divider circuit according to claim 1 including a further capacitor connected to said signal input of said differential amplifier for feeding the signals to be processed to said differential amplifier.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-03-17 | 1989-09-16 | 1990-03-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-03-17 | 1993-09-16 | 1994-03-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-03-17 | 1997-09-16 | 1998-03-18 | $7700.00 | Window Closed / Lapsed |