Abstract A data extracting circuit for converting an analog signal derived from a D.C. component-free modulated digital signal stored on a recording medium, into a D.C. component-free digital signal with a comparator for comparing the analog signal with a reference signal to provide a compared signal. A phase inverter receives the compared signal and provides a first signal component which is in-phase with the compared signal, and a second signal component which is phase-inverted with respect to the compared signal. A clipping circuit limits the amplitude level of the first and second signal components to a predetermined level and provides first and second limited signal components. An integrating circuit separately integrates the first and second limited signal components and provides first and second integrated signals. An error amplifying circuit determines the difference between the first and second integrated signals and provides a signal corresponding to this difference to the comparator as the reference signal. The D.C. component-free digital output signal is derived from the first signal component.
A data extracting circuit for converting an analog signal derived from a D.C. component-free modulated digital signal stored on a recording medium, into a D.C. component-free digital signal, comprising: comparator means for comparing said analog signal with a reference signal and providing a compared signal; phase inverting means for receiving said compared signal and providing a first signal component which is in-phase with said compared signal, and a second signal component which is phase-inverted with respect to said compared signal, said D.C. component-free digital signal being derived from said first signal component; clipping means for limiting an amplitude level of said first and second signal components to a predetermined level to provide first and second limited signal components; integrating means for separately integrating said first and second limited signal components and providing first and second integrated signals; and means for determining a difference between said first and second integrated signals and supplying a signal corresponding to said difference to said comparator means as said reference signal.
Claim 2
Dependent Claim
166 words
A data extracting circuit for converting an analog signal derived from a D.C. component-free modulated digital signal stored on a recording medium, into a D.C. component-free digital signal, comprising: comparator means for comparing said analog signal with a reference signal and providing a compared signal; phase inverting means for receiving said compared signal and providing a first signal component which is in-phase with said compared signal, and a second signal component which is phase-inverted with respect to said compared signal, said D.C. component-free digital signal being derived from said first signal component; clipping means for limiting an amplitude level of said first and second signal components to a predetermined level to provide first and second limited signal components; integrating means for separately integrating said first and second limited signal components and providing first and second integrated signals; and means for determining a difference between said first and second integrated signals and supplying a signal corresponding to said difference to said comparator means as said reference signal.
Claim 3
Dependent Claim
84 words
A circuit according to claim 1 wherein said phase inverting means inlcudes an AND gate supplying said first signal component, and a NAND gate supplying said second signal component, and further including: detector means for ensuring that noise is not included in said first and second signal components, said detector means receiving said analog signal and comparing its amplitude level with a second predetermined level and providing a signal to said AND and NAND gates when said analog signal exceeds said second predetermined level.