← Back to Patent Explorer
US4575585A Expired / Lapsed US ⏱️ 0.0 years remaining

Synchronous programmable signal generator and method

Assignee: Motorola Solutions Inc
•
Filing: 1984-07-16
•
Granted: 1986-03-11
•
Expires: 2004-07-16
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A programmable signal generator and method for generating frequencies that are subharmonics of a rectified 60 hertz input signal. Opto-coupled triacs systematically switch and rectify the input signal frequency to provide, for example, a ringing signal for a telephone system.

Inventors

  • 👤 Leland T. Brown

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 20:53
CPC Classifications
H; H04; H04M; H04M19/00; H04M19/02; H04M19/04

Claims Analysis

Total Claims: 21
Claim 1
Independent Claim 126 words
A programmable signal generator for producing an output signal having a frequency bearing a predetermined relationship to an input signal frequency comprising: frequency synthesizer means for generating a synchronous clocking signal in response to said input signal; counter means coupled to said clocking signal generating means for developing an address signal in response thereto; memory means coupled to said address signal developing means for providing predetermined first and second control signals in response thereto, said first and second control signals having respective passing and rectifying levels thereof; and first and second bilateral switching means for producing said output signal by alternately passing and rectifying selected portions of said input signal in response to said passing and rectifying levels of said first and second control signals respectively.
Claim 2
Dependent Claim 126 words
A programmable signal generator for producing an output signal having a frequency bearing a predetermined relationship to an input signal frequency comprising: frequency synthesizer means for generating a synchronous clocking signal in response to said input signal; counter means coupled to said clocking signal generating means for developing an address signal in response thereto; memory means coupled to said address signal developing means for providing predetermined first and second control signals in response thereto, said first and second control signals having respective passing and rectifying levels thereof; and first and second bilateral switching means for producing said output signal by alternately passing and rectifying selected portions of said input signal in response to said passing and rectifying levels of said first and second control signals respectively.
Claim 3
Dependent Claim 18 words
The programmable signal generator of claim 1 wherein said clocking signal generating means comprises a phase locked loop.
Claim 4
Dependent Claim 17 words
The programmable signal generator of claim 1 wherein said address signal developing means comprises a ripple counter.
Claim 5
Dependent Claim 18 words
The programmable signal generator of claim 1 wherein said control signal providing means comprises a programmable read-only memory.
Claim 6
Dependent Claim 18 words
the programmable signal generator of claim 1 wherein said first and second bilateral switching devices comprise opto-coupled triacs.
Claim 7
Dependent Claim 15 words
The programmable signal generator of claim 1 wherein said input signal frequency is 60 hertz.
Claim 8
Dependent Claim 15 words
The programmable signal generator of claim 1 wherein said output signal frequency is 20 hertz.
Claim 9
Independent Claim 103 words
A method for producing an output signal having a frequency bearing a predetermined relationship to an input signal frequency comprising the steps of: generating a synchronous clocking signal in response to said input signal; developing an address signal in response to said clocking signal; providing predetermined first and second control signals in response to said address signal, said first and second control signals having respective passing and rectifying levels thereof; rectifying selected portions of said input signal in response to said first and second control signal; and passing selected portions of said input signal in response to said first and second control signals.
Claim 10
Independent Claim 103 words
A method for producing an output signal having a frequency bearing a predetermined relationship to an input signal frequency comprising the steps of: generating a synchronous clocking signal in response to said input signal; developing an address signal in response to said clocking signal; providing predetermined first and second control signals in response to said address signal, said first and second control signals having respective passing and rectifying levels thereof; rectifying selected portions of said input signal in response to said first and second control signal; and passing selected portions of said input signal in response to said first and second control signals.
Claim 11
Dependent Claim 20 words
The method of claim 8 wherein said step of generating is carried out by means of a phase locked loop.
Claim 12
Dependent Claim 19 words
The method of claim 8 wherein said step of developing is carried out by means of a ripple counter.
Claim 13
Dependent Claim 20 words
The method of claim 8 wherein said step of providing is carried out by means of a programmable read-only memory.
Claim 14
Dependent Claim 18 words
The method of claim 8 wherein said steps of passing and rectifying are carried out by opto-coupled triacs.
Claim 15
Dependent Claim 135 words
A telephone system including a programmable signal generator for producing a ringing signal having a frequency bearing a predetermined relationship to a 60 hertz input signal comprising: frequency synthesizer means for generating a synchronous clocking signal in response to said 60 hertz input signal; counter means coupled to said clocking signal generating means for developing an address signal in response thereto; memory means coupled to said address signal developing means for providing predetermined first and second control signals in response thereto, said first and second control signals having respective passing and rectifying levels thereof; and first and second bilateral switching means for producing said ringing signal by alternately passing and rectifying selected portions of said 60 HZ input signal in response to said passing and rectifying levels of said first and second control signals respectively.
Claim 16
Dependent Claim 135 words
A telephone system including a programmable signal generator for producing a ringing signal having a frequency bearing a predetermined relationship to a 60 hertz input signal comprising: frequency synthesizer means for generating a synchronous clocking signal in response to said 60 hertz input signal; counter means coupled to said clocking signal generating means for developing an address signal in response thereto; memory means coupled to said address signal developing means for providing predetermined first and second control signals in response thereto, said first and second control signals having respective passing and rectifying levels thereof; and first and second bilateral switching means for producing said ringing signal by alternately passing and rectifying selected portions of said 60 HZ input signal in response to said passing and rectifying levels of said first and second control signals respectively.
Claim 17
Dependent Claim 17 words
The telephone system of claim 13 wherein said clocking signal generating means comprises a phase locked loop.
Claim 18
Dependent Claim 16 words
The telephone system of claim 13 wherein said address signal developing means comprises a ripple counter.
Claim 19
Dependent Claim 17 words
The telephone system of claim 13 wherein said control signal providing means comprises a programmable read-only memory.
Claim 20
Dependent Claim 17 words
The telephone system of claim 13 wherein said first and second bilateral switching devices comprise opto-coupled triacs.
Claim 21
Dependent Claim 15 words
The telephone system of claim 13 wherein said ringing signal frequency is substantially 20 hertz.

References Cited (Backward Citations)

US4220826A Cited
US4349703A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-03-10 1989-09-09 1990-03-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-03-10 1993-09-09 1994-03-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-03-10 1997-09-09 1998-03-11 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag