US4574202A
Expired / Lapsed
US
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Rectifier circuit with attack time variable in response to an input signal level
Assignee: Toshiba Corp
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Filing: 1982-10-15
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Granted: 1986-03-04
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Expires: 2002-10-15
Abstract
Abstract A signal rectifier circuit with attack time changeable in response to an input signal level is disclosed which has a plurality of current transmitting paths connected in parallel between an input terminal and an output terminal. There is also provided a rectifier in every signal transmitting path or a circuit between the output terminal and the parallel circuit of the signal transmitting paths. A capacitor in combination with resistance components involved in the respective signal transmitting paths provides a signal smoothing operation. The signal transmitting paths are given different offset voltages which allow the attack time of the smoothing operation to vary as a function of the input signal level.
Inventors
- 👤 Atsushi Ogawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 12:13
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; G; G01; G01R; G01R19/00; G01R19/04; G01R19/12; G01R19/165; G01R19/16566; G01R19/16585
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
175 words
A signal rectifier circuit with attack time changeable in response to an input signal level comprising: an input terminal for receiving said input signal; an output terminal; capacitor means connected between said output terminal and a reference potential terminal; first means for rectifying said input signal having an input signal current path connected between said input terminal and said output terminal for delivering said input signal, in rectified form, to said output terminal, said first rectifying means including first means for determining a first time constant together with said capacitor means; second means for rectifying said input signal having an input signal current path connected in parallel with said input signal current path of said first rectifying means for delivering said input signal, in rectified form, to said output terminal, said second rectifying means including second means for determining a second time constant together with said capacitor means; means for applying an offset voltage to one of said first and second rectifying means; and wherein said first and second rectifying means include peak detector circuits.
Claim 2
Dependent Claim
175 words
A signal rectifier circuit with attack time changeable in response to an input signal level comprising: an input terminal for receiving said input signal; an output terminal; capacitor means connected between said output terminal and a reference potential terminal; first means for rectifying said input signal having an input signal current path connected between said input terminal and said output terminal for delivering said input signal, in rectified form, to said output terminal, said first rectifying means including first means for determining a first time constant together with said capacitor means; second means for rectifying said input signal having an input signal current path connected in parallel with said input signal current path of said first rectifying means for delivering said input signal, in rectified form, to said output terminal, said second rectifying means including second means for determining a second time constant together with said capacitor means; means for applying an offset voltage to one of said first and second rectifying means; and wherein said first and second rectifying means include peak detector circuits.
Claim 3
Dependent Claim
29 words
A signal rectifier circuit according to claim 1, wherein said first and second rectifying means each comprise a differential amplifier and said peak detector circuits each comprise rectifier means.
Claim 4
Dependent Claim
17 words
A signal rectifier circuit according to claim 2, wherein said offset voltage applying means is a battery.
Claim 5
Dependent Claim
23 words
A signal rectifier circuit according to claim 2, wherein said offset voltage applying means is a resistor connected to a constant current source.
Claim 6
Dependent Claim
32 words
A signal rectifier circuit according to claim 2, wherein one of said differential amplifiers includes transistors and wherein said offset voltage applying means is a resistor connected between emitters of said transistors.
Claim 7
Dependent Claim
32 words
A signal rectifier circuit according to claim 2, wherein one of said differential amplifiers includes transistors and wherein said offset voltage applying means is a diode connected between emitters of said transistors.
Claim 8
Dependent Claim
47 words
A signal rectifier circuit according to claim 2, wherein one of said differential amplifiers comprises first and second transistors and wherein said offset voltage applying means has a greater base-emitter junction area in said first transistor in comparison to the base-emitter junction area of said second transistor.
Claim 9
Dependent Claim
46 words
A signal rectifier circuit according to claim 3, wherein said offset voltage applying means is a voltage divider connected to said output terminal to supply a portion of the output voltage developed at said output terminal to an inverted input of one of said differential amplifiers.
Claim 10
Dependent Claim
146 words
A signal rectifier circuit with attack time changeable in response to an input signal level comprising: an input terminal for receiving said input signal; an output terminal; capacitor means connected between said output terminal and a reference potential terminal; means for rectifying said input signal, said means for rectifying having an output connected to said output terminal; first means for transmitting said input signal connected between said input terminal and an input of said rectifying means, said first transmitting means including a first means for determining a first time constant together with said capacitor means; second means for transmitting said input signal connected in parallel with said first transmitting means, said second transmitting means including second means for determining a second time constant together with said capacitor means; and a battery for applying an offset voltage level to one of said first and second transmitting means.
Claim 11
Dependent Claim
146 words
A signal rectifier circuit with attack time changeable in response to an input signal level comprising: an input terminal for receiving said input signal; an output terminal; capacitor means connected between said output terminal and a reference potential terminal; means for rectifying said input signal, said means for rectifying having an output connected to said output terminal; first means for transmitting said input signal connected between said input terminal and an input of said rectifying means, said first transmitting means including a first means for determining a first time constant together with said capacitor means; second means for transmitting said input signal connected in parallel with said first transmitting means, said second transmitting means including second means for determining a second time constant together with said capacitor means; and a battery for applying an offset voltage level to one of said first and second transmitting means.
Claim 12
Dependent Claim
20 words
A signal rectifier circuit according to claim 9, wherein said first and second signal transmitting means respectively comprise differential amplifiers.
Claim 13
Dependent Claim
152 words
A signal rectifier circuit with attack time changeable in response to an input signal level comprising: an input terminal for receiving said input signal; an output terminal; capacitor means connected between said output terminal and a reference potential terminal; means for rectifying said input signal, said means for rectifying having an output connected to said output terminal; first means for transmitting said input signal connected between said input terminal and an input of said rectifying means, said first transmitting means including a first means for determining a first time constant together with said capacitor means; second means for transmitting said input signal connected in parallel with said first transmitting means, said second transmitting means including second means for determining a second time constant together with said capacitor means; and a resistor connected to a constant current source for applying an offset voltage level to one of said first and second transmitting means.
Claim 14
Dependent Claim
152 words
A signal rectifier circuit with attack time changeable in response to an input signal level comprising: an input terminal for receiving said input signal; an output terminal; capacitor means connected between said output terminal and a reference potential terminal; means for rectifying said input signal, said means for rectifying having an output connected to said output terminal; first means for transmitting said input signal connected between said input terminal and an input of said rectifying means, said first transmitting means including a first means for determining a first time constant together with said capacitor means; second means for transmitting said input signal connected in parallel with said first transmitting means, said second transmitting means including second means for determining a second time constant together with said capacitor means; and a resistor connected to a constant current source for applying an offset voltage level to one of said first and second transmitting means.
Claim 15
Dependent Claim
181 words
A signal rectifier circuit with attack time changeable in response to an input signal level comprising: an input terminal for receiving said input signal; an output terminal; capacitor means connected between said output terminal and a reference potential terminal; means for rectifying said input signal, said means for rectifying having an output connected to said output terminal; first means for transmitting said input signal connected between said input terminal and an input of said rectifying means, said first transmitting means including a first differential amplifier and first means for determining a first time constant together with said capacitor means; second means for transmitting said input signal connected in parallel with said first transmitting means, said second transmitting means including a second differential amplifier and second means for determining a second time constant together with said capacitor means; and means for applying an offset voltage level to one of said first and second transmitting means, wherein one of said first and second differential amplifiers includes transistors and wherein said offset voltage applying means is a resistor connected between emitters of said transistors.
Claim 16
Dependent Claim
181 words
A signal rectifier circuit with attack time changeable in response to an input signal level comprising: an input terminal for receiving said input signal; an output terminal; capacitor means connected between said output terminal and a reference potential terminal; means for rectifying said input signal, said means for rectifying having an output connected to said output terminal; first means for transmitting said input signal connected between said input terminal and an input of said rectifying means, said first transmitting means including a first differential amplifier and first means for determining a first time constant together with said capacitor means; second means for transmitting said input signal connected in parallel with said first transmitting means, said second transmitting means including a second differential amplifier and second means for determining a second time constant together with said capacitor means; and means for applying an offset voltage level to one of said first and second transmitting means, wherein one of said first and second differential amplifiers includes transistors and wherein said offset voltage applying means is a resistor connected between emitters of said transistors.
Claim 17
Dependent Claim
178 words
A signal rectifier circuit with attack time changeable in response to an input signal level comprising: an input terminal for receiving said input signal; an output terminal; capacitor means connected between said output terminal and a reference potential terminal; means for rectifying said input signal, said means for rectifying having an output connected to said output terminal; first means for transmitting said input signal connected between said input terminal and an input of said rectifying means, said first transmitting means including a first differential amplifier and first means for determining a first time constant together with said capacitor means; second means for transmitting said input signal connected in parallel with said first transmitting means, said second transmitting means including a second differential amplifier and second means for determining a second time constant together with said capacitor means; and means for applying an offset voltage level to one of said first and second transmitting means, wherein one of said differential amplifiers includes transistors and wherein said offset voltage applying means is a diode connected between emitters of said transistors.
Claim 18
Dependent Claim
178 words
A signal rectifier circuit with attack time changeable in response to an input signal level comprising: an input terminal for receiving said input signal; an output terminal; capacitor means connected between said output terminal and a reference potential terminal; means for rectifying said input signal, said means for rectifying having an output connected to said output terminal; first means for transmitting said input signal connected between said input terminal and an input of said rectifying means, said first transmitting means including a first differential amplifier and first means for determining a first time constant together with said capacitor means; second means for transmitting said input signal connected in parallel with said first transmitting means, said second transmitting means including a second differential amplifier and second means for determining a second time constant together with said capacitor means; and means for applying an offset voltage level to one of said first and second transmitting means, wherein one of said differential amplifiers includes transistors and wherein said offset voltage applying means is a diode connected between emitters of said transistors.
Claim 19
Dependent Claim
196 words
A signal rectifier circuit with attack time changeable in response to an input signal level comprising: an input terminal for receiving said input signal; an output terminal; capacitor means connected between said output terminal and a reference potential terminal; means for rectifying said input signal, said means for rectifying having an output connected to said output terminal; first means for transmitting said input signal connected between said input terminal and an input of said rectifying means, said first transmitting means including a first differential amplifier and first means for determining a first time constant together with said capacitor means; second means for transmitting said input signal connected in parallel with said first transmitting means, said second transmitting means including a second differential amplifier and second means for determining a second time constant together with said capacitor means; and means for applying an offset voltage level to one of said first and second transmitting means, wherein one of said first and second differential amplifiers comprises first and second transistors and wherein said offset voltage applying means has a greater base-emitter junction area in said first transistor in comparison to the base-emitter junction area of said second transistor.
Claim 20
Dependent Claim
196 words
A signal rectifier circuit with attack time changeable in response to an input signal level comprising: an input terminal for receiving said input signal; an output terminal; capacitor means connected between said output terminal and a reference potential terminal; means for rectifying said input signal, said means for rectifying having an output connected to said output terminal; first means for transmitting said input signal connected between said input terminal and an input of said rectifying means, said first transmitting means including a first differential amplifier and first means for determining a first time constant together with said capacitor means; second means for transmitting said input signal connected in parallel with said first transmitting means, said second transmitting means including a second differential amplifier and second means for determining a second time constant together with said capacitor means; and means for applying an offset voltage level to one of said first and second transmitting means, wherein one of said first and second differential amplifiers comprises first and second transistors and wherein said offset voltage applying means has a greater base-emitter junction area in said first transistor in comparison to the base-emitter junction area of said second transistor.
Claim 21
Dependent Claim
195 words
A signal rectifier circuit with attack time changeable in response to an input signal level comprising: an input terminal for receiving said input signal; an output terminal; capacitor means connected between said output terminal and a reference potential terminal; means for rectifying said input signal, said means for rectifying having an output connected to said output terminal; first means for transmitting said input signal connected between said input terminal and an input of said rectifying means, said first transmitting means including a first differential amplifier and first means for determining a first time constant together with said capacitor means; second means for transmitting said input signal connected in parallel with said first transmitting means, said second transmitting means including a second differential amplifier and second means for determining a second time constant together with said capacitor means; and means for applying an offset voltage level to one of said first and second transmitting means, wherein said offset voltage applying means is a voltage divider connected to said output terminal to supply a portion of the output voltage developed at said output terminal to an inverted input of one of said first and second differential amplifiers.
Claim 22
Dependent Claim
195 words
A signal rectifier circuit with attack time changeable in response to an input signal level comprising: an input terminal for receiving said input signal; an output terminal; capacitor means connected between said output terminal and a reference potential terminal; means for rectifying said input signal, said means for rectifying having an output connected to said output terminal; first means for transmitting said input signal connected between said input terminal and an input of said rectifying means, said first transmitting means including a first differential amplifier and first means for determining a first time constant together with said capacitor means; second means for transmitting said input signal connected in parallel with said first transmitting means, said second transmitting means including a second differential amplifier and second means for determining a second time constant together with said capacitor means; and means for applying an offset voltage level to one of said first and second transmitting means, wherein said offset voltage applying means is a voltage divider connected to said output terminal to supply a portion of the output voltage developed at said output terminal to an inverted input of one of said first and second differential amplifiers.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-03-03 | 1989-09-02 | 1990-03-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-03-03 | 1993-09-02 | 1994-03-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-03-03 | 1997-09-02 | 1998-03-04 | $7700.00 | Window Closed / Lapsed |