Abstract Techniques are disclosed for converting a multibit digital data word into a corresponding analog signal. The converter of the present invention utilizes information in a received signal plus noise associated with the information in such a manner as to reduce the mean squared error in the generated analog signal. The actual voltage associated with each bit position in the digital word is measured. In addition, a measurement of the signal-to-noise ratio is made. From these two measurements a processing device is adapted to generate a value corresponding to the statistical probability that the detected voltage level for each bit is a logical one. The probability values are used as scaling factors to modify the weights to be given each bit during the normal digital to analog conversion process.
In a method of converting a multibit digital data word into a corresponding analog signal, the method including the steps of multiplying weighting factors for each bit position with a value associated with each bit in a series of analog multipliers, and wherein the outputs of said analog multipliers are summed together to form the resultant analog signal, the improvement comprising: generating a probability value for each bit corresponding to the probability that the bit is a logical one as a function of measurements of voltage characteristics of each bit and noise associated with the word to be converted; and using said probability values as scaling factors to modify the outputs of said analog multipliers to thereby reduce potential for error.
Claim 2
Dependent Claim
121 words
In a method of converting a multibit digital data word into a corresponding analog signal, the method including the steps of multiplying weighting factors for each bit position with a value associated with each bit in a series of analog multipliers, and wherein the outputs of said analog multipliers are summed together to form the resultant analog signal, the improvement comprising: generating a probability value for each bit corresponding to the probability that the bit is a logical one as a function of measurements of voltage characteristics of each bit and noise associated with the word to be converted; and using said probability values as scaling factors to modify the outputs of said analog multipliers to thereby reduce potential for error.