Drift-equalized, multi-frequency oscillator

Claim 2

A frequency switchable oscillator having a frequency of oscillation relative to an oscillator ground, said frequency being selected from a predetermined number of discrete frequencies, said oscillator comprising: a. a resonant circuit having 1. a predetermined number of reactive impedance paths for determining each frequency of oscillation from the predetermined number of discrete frequencies, 2. a first PIN diode, having forward and reverse biased modes, the first diode coupled to one of the reactive impedance paths so that when the first diode is in the reverse bias mode the first diode electrically removes the one of the reactive impedance paths from said resonant circuit, 3. a selective energizing section for energizing the first PIN diode in the forward biased mode so that the one of the reactive impedance paths coupled to the first diode is electrically coupled into said resonant circuit through the first diode when the first diode is in the forward biased mode and so that the one of the reactive impedance paths coupled to the first diode substantially influences the frequency of oscillation of the oscillator, 4. means, coupled to the first PIN diode and coupled to the selective energizing section, for isolating the one of said reactive impedance paths connected to said first PIN diode from the selective energizing section and from oscillator ground, and for providing biasing current to said first PIN diode, and 5. a crystal, having a natural resonant frequency, the crystal coupled to the plurality of reactive impedance paths so that the crystal is an integral portion of each of the reactive impedance paths; b. means, coupled to said resonant circuit, for amplifying the oscillation; and c. selection logic, coupled to the selective energizing means of said resonant circuit, for providing a selection signal which causes the oscillator to oscillate at one of the predetermined frequencies.

Claim 3

An oscillator as claimed in claim 3, wherein: a. the predetermined number of discrete frequencies consists of a high discrete frequency and a low discrete frequency; b. the predetermined number of reactive impedance paths of said resonant circuit consists of a first reactive impedance path and a second reactive impedance path; and c. the natural resonant frequency of the crystal of said resonant circuit is greater than the low discrete frequency and is less than the high discrete frequency.

Claim 4

An oscillator as claimed in claim 2 wherein said resonant circuit additionally comprises a second PIN diode and wherein: a. one of said resonant circuit first and second reactive impedance paths comprises a first capacitor and the other of the reactive impedance paths comprises a second capacitor; b. said resonant circuit first PIN diode has a cathode and an anode and couples in series with the first capacitor so that the first diode cathode is coupled to said first capacitor; c. said resonant circuit second PIN diode has a cathode and an anode and couples in series with the second capacitor so that the second diode anode is coupled to the second capacitor; and d. said resonant circuit isolating means isolates both the first and second capacitors from said resonant circuit selective biasing means and oscillator ground, and provides biasing currents to both the first and second PIN diodes.

Claim 5

An oscillator as claimed in claim 3 wherein said resonant circuit isolating means comprises: a. a first resistor having first and second nodes, the first resistor first node coupled to the cathode of the first PIN diode; b. a second resistor having first and second nodes, the second resistor first node coupled to the anode of the second PIN diode, and the second resistor second node coupled to the first resistor second node and to said resonant circuit selective energizing means; and c. a third resistor having first and second nodes, said third resistor first node coupled to one of the anode of the first PIN diode and the cathode of the second PIN diode, the third resistor second electrode coupled to said resonant circuit selective energizing means.

Claim 6

An oscillator as claimed in claim 4 wherein said resonant circuit additionally comprises a first bypass capacitor coupled to one of the anode of the first PIN diode and the cathode of the second PIN diode for confining PIN diode biasing currents to the PIN diodes.

Claim 7

A frequency switchable oscillator having a frequency of oscillation relative to an oscillator ground, said frequency being selected from a predetermined number of discrete frequencies, said oscillator comprising: a. resonant circuit having 1. a predetermined number of reactive impedance paths for determining each frequency of oscillation from the predetermined number of discrete frequencies, 2. a first PIN diode, having forward and reverse biased modes, the first diode coupled to one of the reactive impedance paths so that when the first diode is in the reverse biased mode the first diode electrically removes the one of the reactive impedance paths from said resonant circuit, 3. a selective energizing section for energizng the first PIN diode in the forward biased mode so that the one of the reactive impedance paths coupled to the first diode is electrically coupled into said resonant circuit through the first diode when the first diode is in the forward biased mode and so that the one of the reactive impedance paths coupled to the first diode substantially influences the frequency of oscillation of the oscillator, and 4. means, coupled to the first PIN diode and coupled to the selective energizing section, for isolating the one of said reactive impedance paths connected to said first PIN diode from the selective energizing section and from oscillator ground, and for providing biasing current to said first PIN diode; b. selection logic, coupled to the selective energizing means of said resonant circuit, for providing a selection signal which causes the oscillator to oscillate at one of the predetermined frequencies; c. a first transistor having an emitter and a collector, said first transistor emitter coupled to said resonant circuit; d. a second transistor having an emitter, base and collector, said first transistor collector coupled to said sescond transistor base, and said second transistor emitter coupled to said resonant circuit; e. a loop gain resistor coupled between said first transistor collector and oscillator ground for adjusting the gain of a circuit loop formed from said first transistor, said second transistor, and said resonant circuit; and f. means, coupled to said first and second transistors, for supplying biasing current to said first and second transistors.

Claim 8

A frequency switchable oscillator having a frequency of oscillation relative to an oscillator ground, said frequency being selected from a predetermined number of discrete frequencies, said oscillator comprising: a. resonant circuit having 1. a predetermined number of reactive impedance paths for determining each frequency of oscillation from the predetermined number of discrete frequencies, 2. a first PIN diode, having forward and reverse biased modes, the first diode coupled to one of the reactive impedance paths so that when the first diode is in the reverse biased mode the first diode electrically removes the one of the reactive impedance paths from said resonant circuit, 3. a selective energizing section for energizng the first PIN diode in the forward biased mode so that the one of the reactive impedance paths coupled to the first diode is electrically coupled into said resonant circuit through the first diode when the first diode is in the forward biased mode and so that the one of the reactive impedance paths coupled to the first diode substantially influences the frequency of oscillation of the oscillator, and 4. means, coupled to the first PIN diode and coupled to the selective energizing section, for isolating the one of said reactive impedance paths connected to said first PIN diode from the selective energizing section and from oscillator ground, and for providing biasing current to said first PIN diode; b. selection logic, coupled to the selective energizing means of said resonant circuit, for providing a selection signal which causes the oscillator to oscillate at one of the predetermined frequencies; c. a first transistor having an emitter and a collector, said first transistor emitter coupled to said resonant circuit; d. a second transistor having an emitter, base and collector, said first transistor collector coupled to said sescond transistor base, and said second transistor emitter coupled to said resonant circuit; e. a loop gain resistor coupled between said first transistor collector and oscillator ground for adjusting the gain of a circuit loop formed from said first transistor, said second transistor, and said resonant circuit; and f. means, coupled to said first and second transistors, for supplying biasing current to said first and second transistors.

Claim 9

An oscillator circuit as claimed in claim 6 wherein said transistor biasing means comprises a current mirror.

Claim 10

An oscillator circuit as claimed in claim 7 additionally comprising a decoupling inductor coupled between said current mirror and the emitter of said first transistor for reducing the influence of oscillations on said current mirror.

Claim 11

An oscillator circuit as claimed in claim 6 additionally comprising an impedance matching network coupled to the collector of said second transistor.

Claim 12

A drift-equalized, FSK oscillator having high and low discrete frequencies of oscillation responsive to a digital signal having first and second logical states, the oscillator comprising: a. a series resonant crystal having a natural resonant frequency higher than the low discrete frequency and lower than the high discrete frequency, and said crystal having first and second nodes; b. an inductor in series with said crystal so that said inductor is coupled to said crystal second node; c. a first capacitor coupled to said inductor and crystal so that said first capacitor, inductor, and crystal substantially influence the determination of a first of the high and low discrete frequencies; d. a second capacitor coupled to said inductor and crystal so that said second capacitor, inductor, and crystal substantially influence the determination of a second of the high and low discrete frequencies; e. a first PIN diode, having a cathode and an anode, said first PIN diode cathode being coupled to said first capacitor; f. a second PIN diode, having a cathode and an anode, said second PIN diode anode being coupled to said second capacitor, and said second PIN diode cathode being coupled to said first PIN diode anode; g. means for biasing said first and second PIN diodes so that said first PIN diode is forward biased while said second PIN diode is reverse biased in response to the external digital signal being in a first logical state, and so that said first PIN diode is reverse biased while said second PIN diode is forward biased in response to the external digital signal being in a second logical state; h. a first transistor having an emitter and a collector, said first transistor emitter coupled to a first one of the first node of said crystal and said PIN diodes; i. a second transistor having an emitter, base and collector, said first transistor collector coupled to said second transistor base, and said second transistor emitter coupled to a second one of the first node of said crystal and said PIN diodes; j. a current mirror coupled to the emitters of said first and second transistors for biasing said first and second transistors; k. a decoupling inductor coupled between said current mirror and said first transistor; and l. an impedance matching network coupled to the collector of said second transistor.

Claim 13

A drift-equalized, FSK oscillator having high and low discrete frequencies of oscillation responsive to a digital signal having first and second logical states, the oscillator comprising: a. a series resonant crystal having a natural resonant frequency higher than the low discrete frequency and lower than the high discrete frequency, and said crystal having first and second nodes; b. an inductor in series with said crystal so that said inductor is coupled to said crystal second node; c. a first capacitor coupled to said inductor and crystal so that said first capacitor, inductor, and crystal substantially influence the determination of a first of the high and low discrete frequencies; d. a second capacitor coupled to said inductor and crystal so that said second capacitor, inductor, and crystal substantially influence the determination of a second of the high and low discrete frequencies; e. a first PIN diode, having a cathode and an anode, said first PIN diode cathode being coupled to said first capacitor; f. a second PIN diode, having a cathode and an anode, said second PIN diode anode being coupled to said second capacitor, and said second PIN diode cathode being coupled to said first PIN diode anode; g. means for biasing said first and second PIN diodes so that said first PIN diode is forward biased while said second PIN diode is reverse biased in response to the external digital signal being in a first logical state, and so that said first PIN diode is reverse biased while said second PIN diode is forward biased in response to the external digital signal being in a second logical state; h. a first transistor having an emitter and a collector, said first transistor emitter coupled to a first one of the first node of said crystal and said PIN diodes; i. a second transistor having an emitter, base and collector, said first transistor collector coupled to said second transistor base, and said second transistor emitter coupled to a second one of the first node of said crystal and said PIN diodes; j. a current mirror coupled to the emitters of said first and second transistors for biasing said first and second transistors; k. a decoupling inductor coupled between said current mirror and said first transistor; and l. an impedance matching network coupled to the collector of said second transistor.