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US4570262A Expired / Lapsed US ⏱️ 0.0 years remaining

Programmable universal logic driver

Assignee: Boeing Co
•
Filing: 1983-06-22
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Granted: 1986-02-11
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Expires: 2003-06-22
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Abstract

Abstract A programmable universal logic driver for handling various voltage combinations encountered in computer logic testing of a unit under test. The logic driver fits in both single ended and differential applications and provides for external voltage control, variable voltage drive, tristate or electronic "off" and limiting of output current.

Inventors

  • 👤 Gary D. Barbknecht
  • 👤 Buford E. Terrell

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 17:56
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/319; G01R31/31903; G01R31/31908; G01R31/31917; G01R31/31924

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 243 words
A programmable universal logic driver for handling various voltage combinations encountered in computer logic testing between a microprocessor control and a unit under test, the logic driver comprising: a first voltage level shifter adapted for connection to the microprocessor control for shifting a data input drive voltage, the first shifter having a common emitter stage and emitter follower for high voltage swing and low impedance drive; a second voltage level shifter adapted for connection to the microprocessor control for shifting a tri-state input control, the second shifter including a common emitter stage and emitter follower for high voltage swing and low impedance drive; a first current driver connected to the first level shifter, the first current driver receiving positive and negative voltage from an external source, the positive and negative voltage source greater than the voltage output received from the first level shifter; a second current driver connected to the second level shifter, the first and second current drivers including a dual emitter follower for high current drive to rapidly sweep current output; a first transistor output driver connected to the first and second current drivers, the first transistor output driver adapted for receiving programmable voltage from the microprocessor; and a second transistor output driver connected to the first and second current drivers, the first and second transistor output drivers adapted for connection to the unit under test, the second transistor output driver adapted for receiving programmable external voltage from the microprocessor control.
Claim 2
Dependent Claim 243 words
A programmable universal logic driver for handling various voltage combinations encountered in computer logic testing between a microprocessor control and a unit under test, the logic driver comprising: a first voltage level shifter adapted for connection to the microprocessor control for shifting a data input drive voltage, the first shifter having a common emitter stage and emitter follower for high voltage swing and low impedance drive; a second voltage level shifter adapted for connection to the microprocessor control for shifting a tri-state input control, the second shifter including a common emitter stage and emitter follower for high voltage swing and low impedance drive; a first current driver connected to the first level shifter, the first current driver receiving positive and negative voltage from an external source, the positive and negative voltage source greater than the voltage output received from the first level shifter; a second current driver connected to the second level shifter, the first and second current drivers including a dual emitter follower for high current drive to rapidly sweep current output; a first transistor output driver connected to the first and second current drivers, the first transistor output driver adapted for receiving programmable voltage from the microprocessor; and a second transistor output driver connected to the first and second current drivers, the first and second transistor output drivers adapted for connection to the unit under test, the second transistor output driver adapted for receiving programmable external voltage from the microprocessor control.
Claim 3
Dependent Claim 37 words
The logic driver as described in claim 1 wherein the first current driver includes an inverting transistor for complementary drive to the first and second output drivers and alternately pulling positive and negative voltage but not simultaneously.
Claim 4
Dependent Claim 27 words
The logic driver as described in claim 1 wherein the transistors are a power VMOS transistor connected in a standard totem-pole for fast rise and fall characteristics.
Claim 5
Dependent Claim 41 words
The logic driver as described in claim 1 further including a first voltage buffer connected between the first output driver and the programmable voltage source and a second voltage buffer connected between the second output driver and the programmable voltage source.
Claim 6
Dependent Claim 37 words
The logic driver as described in claim 1 wherein the second current driver provides a polarity of signals to simultaneously shut off both the output drivers and to disable or tri-state the output of the logic driver.

References Cited (Backward Citations)

US3832535A Cited
US4102491A Cited
US4092589A Cited
US4348759A Cited
US4439858A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-02-10 1989-08-12 1990-02-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-02-10 1993-08-12 1994-02-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-02-10 1997-08-12 1998-02-11 $7700.00 Window Closed / Lapsed

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