← Back to Patent Explorer
US4568913A Expired / Lapsed US ⏱️ 0.0 years remaining

High speed integrating analog-to-digital converter

Assignee: Intersil Corp
•
Filing: 1982-11-22
•
Granted: 1986-02-04
•
Expires: 2002-11-22
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An integrating type analog-to-digital converter with improved time measurement capabilities and a very fast conversion cycle. The converter operates by integrating an analog input signal for a predetermined time period and then deintegrating the integrated signal until its output crosses zero. The time it takes for the integrator to cross zero is measured by a digital clock, and the zero crossing is detected as occurring on the first clock pulse after the integrator output has actually crossed zero. The residual output of the integrator at the point of detection is multiplied by a predetermined negative amount and fed back so that the integrator output assumes the multiplied value of the residual. The integrator is then deintegrated for a second time and the time it takes for the integrator output to pass zero is again measured by the clock. The measured time is proportional to the error in the measurement between the detected zero crossing and actual zero crossing in the initial deintegration cycle. By subtracting a predetermined fraction of the second deintegration time from the first deintegration time, a more accurate measure of the actual time it takes the integrator output to cross zero is obtained. By utilizing a plurality of subsequent multiplication and deintegration cycles, the resolution of the actual deintegration time measurement may be further increased. Using this technique, a 12 bit measurement can be made with less than 200 clock pulses as a opposed to 8,192 (2 13 ) in prior art converters.

Inventors

  • 👤 Lee L. Evans

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 07:59
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/50; H03M1/52; H03M1/34; H03M1/38; H03M1/40

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 164 words
An integrating analog-to-digital converter comprising: an integrator which integrates an unknown analog input signal for a predetermined time period and is subsequently deintegrated at a fixed rate until its output crosses a reference level; digital clock means for measuring a first time period from the start of deintegration until the detection of a clock pulse after the output of the integrator crosses the reference level; first means for providing a measurement of a second time period between the actual crossing of the reference level and the occurrence of said clock pulse, said first means including means for causing the integrator to assume an output level equal to a predetermined multiple of the residual output of the integrator at the occurrence of said clock pulse and means for again deintegrating the integrator at said fixed rate to obtain the second time period; and second means for arithmetically combining the measured first and second time periods and generating a digital output of the combined time periods.
Claim 2
Dependent Claim 164 words
An integrating analog-to-digital converter comprising: an integrator which integrates an unknown analog input signal for a predetermined time period and is subsequently deintegrated at a fixed rate until its output crosses a reference level; digital clock means for measuring a first time period from the start of deintegration until the detection of a clock pulse after the output of the integrator crosses the reference level; first means for providing a measurement of a second time period between the actual crossing of the reference level and the occurrence of said clock pulse, said first means including means for causing the integrator to assume an output level equal to a predetermined multiple of the residual output of the integrator at the occurrence of said clock pulse and means for again deintegrating the integrator at said fixed rate to obtain the second time period; and second means for arithmetically combining the measured first and second time periods and generating a digital output of the combined time periods.
Claim 3
Dependent Claim 245 words
An integrating analog-to-digital converter comprising: an integrator which is charged to a level established by an analog input signal during an integrate cycle of fixed time and is then deintegrated at a fixed rate for an initial time period until a reference level is crossed, wherein the time to the reference crossing is indicative of the magnitude of the analog input signal; clock means which provide clock pulses at predetermined intervals for measuring the deintegration time, wherein a time measurement error is introduced because the clock means measures up to the occurrence of at least one clock pulse after actual reference crossing and wherein the pulse width of the clock means is greater than the quantum of time measurement required for the least significant digit of a conversion to be accurate; correction means for (a) altering the output of the integrator at the end of the measured deintegration time so that it is equal to a predetermined multiple of its residual output at the end of the measured deintegration time and causing the integrator to again be deintegrated at said fixed rate to obtain an error measurement proportional to the time between actual reference crossing and the occurrence of the clock pulse at which the deintegration time measurement is stopped, and (b) subtracting said error measurement from the measured deintegration time to obtain a corrected measurement of the deintegration time; and output means for providing a digital output as a function of said corrected measurement.
Claim 4
Dependent Claim 245 words
An integrating analog-to-digital converter comprising: an integrator which is charged to a level established by an analog input signal during an integrate cycle of fixed time and is then deintegrated at a fixed rate for an initial time period until a reference level is crossed, wherein the time to the reference crossing is indicative of the magnitude of the analog input signal; clock means which provide clock pulses at predetermined intervals for measuring the deintegration time, wherein a time measurement error is introduced because the clock means measures up to the occurrence of at least one clock pulse after actual reference crossing and wherein the pulse width of the clock means is greater than the quantum of time measurement required for the least significant digit of a conversion to be accurate; correction means for (a) altering the output of the integrator at the end of the measured deintegration time so that it is equal to a predetermined multiple of its residual output at the end of the measured deintegration time and causing the integrator to again be deintegrated at said fixed rate to obtain an error measurement proportional to the time between actual reference crossing and the occurrence of the clock pulse at which the deintegration time measurement is stopped, and (b) subtracting said error measurement from the measured deintegration time to obtain a corrected measurement of the deintegration time; and output means for providing a digital output as a function of said corrected measurement.

References Cited (Backward Citations)

US3296613A Cited
US3577140A Cited
US3646586A Cited
US4161724A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-02-03 1989-08-05 1990-02-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-02-03 1993-08-05 1994-02-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-02-03 1997-08-05 1998-02-04 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag