US4568882A
Expired / Lapsed
US
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Digital FSK demodulator circuit
Assignee: National Semiconductor Corp
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Filing: 1984-10-01
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Granted: 1986-02-04
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Expires: 2004-10-01
Abstract
Abstract An FSK demodulator is disclosed suitable for use in a CMOS IC using switched capacitor circuits. The mark and space filters are each modified to produce sine and cosine outputs. These outputs are rectified separately and the result summed. The summed outputs are passed through low pass filters and applied to a comparator which determines which of the mark and space signals is dominant. The invention substantially reduces the size of the demodulator filter capacitors and improves the demodulation signal to noise ratio.
Inventors
- 👤 Peter S. Single
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 04:34
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/10; H04L27/14; H04L27/144; H04L27/152; H04L27/1525
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
73 words
An FSK demodulator circuit comprising: an input terminal coupled to drive mark and space bandpass filters, each having a pair of quadrature related outputs; means for rectifying each of the outputs of said bandpass filters; means for summing the quadrature related and rectified mark bandpass filter outputs; means for summing the quadrature related and rectified space bandpass filter outputs; and means for passing each of the summed signals through low pass filter means.
Claim 2
Dependent Claim
73 words
An FSK demodulator circuit comprising: an input terminal coupled to drive mark and space bandpass filters, each having a pair of quadrature related outputs; means for rectifying each of the outputs of said bandpass filters; means for summing the quadrature related and rectified mark bandpass filter outputs; means for summing the quadrature related and rectified space bandpass filter outputs; and means for passing each of the summed signals through low pass filter means.
Claim 3
Dependent Claim
19 words
The circuit of claim 1 further including means for comparing the signals obtained at the low pass filter outputs.
Claim 4
Dependent Claim
30 words
The circuit of claim 2 wherein said bandpass filters are of the switched capacitor biquadratic topology and each one is configured to produce a sine output and a cosine output.
Claim 5
Dependent Claim
18 words
The circuit of claim 3 wherein said low pass filter means comprise switched capacitor Sallen Key topology circuits.
References Cited (Backward Citations)
US4471312A
Cited
US4481642A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-02-03 | 1989-08-05 | 1990-02-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-02-03 | 1993-08-05 | 1994-02-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-02-03 | 1997-08-05 | 1998-02-04 | $7700.00 | Window Closed / Lapsed |