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US4568843A Expired / Lapsed US ⏱️ 0.0 years remaining

Bistable logic device, operating from DC to 10 GHz, and frequency divider including this bistable device

Assignee: Thales SA
•
Filing: 1983-06-17
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Granted: 1986-02-04
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Expires: 2003-06-17
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Abstract

Abstract A bistable logic device, of the RSTT type, operating up to X band. The bistable logic device is organized into three stages: an input stage of four NOR operators (21, 31, 41, 51), a second stage of two OR operators (61, 71) and an output stage of two OR operators (62, 72). Each NOR operator of the input stage drives in parallel an OR operator of the second stage and an OR operator of the output stage. Each of the four OR operators are fed back to an input of one of the four NOR operators of the input stage. The organization in logic NOR/OR form makes it possible to use faster single gate transistors. The present invention may be particularly useful to frequency dividers for interfacing between signals at GHz frequency and measurement and control circuits at MHz frequency.

Inventors

  • 👤 Maurice Gloanec
  • 👤 Georges Bert
  • 👤 Ernesto Perea

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 16:47
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/027; H03K3/037; H03K3/353; H03K3/356; H03K3/356069

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 117 words
A bistable logic device having an operating frequency from DC to 10 GHz, comprising: two inputs I and I, receiving complementary input signals T and T at frequency f i ; two outputs providing complementary output signals Q and Q at frequency f i /2; a first stage receiving said input signals and having four NOR gates; a second stage connected to said first stage and having two OR gates; and a third stage connected to said first stage and having two OR gates, said third stage providing said output signals, wherein each said NOR gate has an output connected to one OR gate from said second stage and to one OR gate from said third stage.
Claim 2
Dependent Claim 117 words
A bistable logic device having an operating frequency from DC to 10 GHz, comprising: two inputs I and I, receiving complementary input signals T and T at frequency f i ; two outputs providing complementary output signals Q and Q at frequency f i /2; a first stage receiving said input signals and having four NOR gates; a second stage connected to said first stage and having two OR gates; and a third stage connected to said first stage and having two OR gates, said third stage providing said output signals, wherein each said NOR gate has an output connected to one OR gate from said second stage and to one OR gate from said third stage.
Claim 3
Dependent Claim 98 words
A device according to claim 1 wherein said NOR gates include first, second, third and fourth NOR gates, and wherein said second stage OR gates include first and second OR gates, outputs of said first and second NOR gates being connected to inputs of said first OR gate, outputs of said third and fourth OR gates being connected to inputs of said second OR gate, output of said first OR gate being connected to an input of said third NOR gate, and output of said second OR gate being connected to an input of said second NOR gate.
Claim 4
Dependent Claim 84 words
Apparatus according to claim 2 wherein said third stage OR gates include third and fourth OR gates, inputs of said third OR gate being connected to outputs of said first and third NOR gates, inputs of said fourth OR gate being connected to outputs of said second and fourth OR gates, output of said third OR gate being connected to an input of said fourth NOR gate, and output of said fourth OR gate being connected to an input of said first NOR gate.
Claim 5
Dependent Claim 50 words
Apparatus according to claim 3 wherein said first and fourth NOR gates receive said input signal T, and said second and third NOR gates receive said input signal T, and wherein said third OR gate provides said output signal Q and said fourth OR gate provides said output signal Q.
Claim 6
Dependent Claim 19 words
A device according to claim 1 integrated with single gate transistors in a monnolithic circuit on a semiconductor crystal.
Claim 7
Dependent Claim 24 words
A frequency divider, functioning in the range 0 to 10 GHz, which contains at least one logic bistable device as claimed in claim 1.

References Cited (Backward Citations)

US3845325A Cited
FR2362534A1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-02-03 1989-08-05 1990-02-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-02-03 1993-08-05 1994-02-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-02-03 1997-08-05 1998-02-04 $7700.00 Window Closed / Lapsed

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