Current supply circuit with redundant back-up current source

Claim 1

A current supply circuit comprising: first and second power source terminals; a plurality of output terminals; a first current mirror circuit including a first input transistor whose current path is connected between said first and second power source terminals, and a plurality of output transistors whose current paths are connected between said first power source terminal and said plurality of output terminals and whose bases are connected to the base of said first input transistor; a second current mirror circuit including a second input transistor whose current path is connected between said first and second power source terminals, and a plurality of output transistors whose current paths are connected between said first power source terminal and said plurality of output terminals and whose bases are connected to the base of said second input transistor; first input current setting means connected to said first input transistor for limiting current flowing through said first input transistor; second input current setting means connected to said second input transistor for limiting current flowing through said second input transistor; a plurality of first resistance means connected respectively between said first power source terminal and said plurality of output transistors constituting said first current mirror circuit; a plurality of second resistance means connected respectively between said second power source terminal and said plurality of output transistors constituting said second current mirror circuit; and control means for detecting current flowing through said first input transistor, and supplying a first control signal to said second input transistor to set said second input transistor into an inoperative state when it is detected that a current is flowing through said first input transistor, and for supplying a second control signal to said second input transistor to set said second input transistor into an operative state when it is detected that a current is not flowing through said first input transistor, said control means including a control transistor having an emitter connected to said first power source terminal, a collector connected to the base of said second input transistor, and a base connected to said second power source terminal through the current path of said first input transistor.