US4564816A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Predistortion circuit
Assignee: Lockheed Martin Corp
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Filing: 1984-05-09
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Granted: 1986-01-14
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Expires: 2004-05-09
Abstract
Abstract A predistortion circuit for use with a solid state power amplifier or traveling wave tube amplifier which exhibits phase and amplitude nonlinearities. The predistortion circuit, which produces gain and phase distortion complementary to that of the associated power amplifier, comprises a hybrid circuit for splitting the input signal into two output signals at respective output terminals, the signals having a relative phase difference of 90°, a pair of dual gate FETs or other active nonlinear devices each connected to a different one of the two output terminals and a combiner for combining in-phase the outputs of the nonlinear devices. Bias on the nonlinear devices is adjusted to effect, in the predistortion circuit, nonlinearities complementary to those of the power amplifier.
Inventors
- 👤 Mahesh Kumar
- 👤 James C. Whartenby
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 14:50
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/32; H03F1/3241
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
177 words
A predistortion circuit for predistorting a signal applied to a following power amplifier exhibiting phase and amplitude nonlinearities as a function of input power, said circuit comprising in combination: an input terminal coupled to receive a signal to be amplified and an output terminal coupled to the input of said power amplifier; means for power dividing a signal applied to the circuit input terminal and for providing a 90° phase shift of one divided signal relative to the other; first and second active nonlinear means each adapted for receiving an input signal from a different one of the outputs of said power divider and each adapted for producing an output signal; and means coupled to receive the output signals from the nonlinear means for combining in phase the signals produced by the active nonlinear means; said active nonlinear means each adapted for receiving a bias voltage for controlling the amount of distortion produced by the predistortion circuit whereby the predistortion circuit predistorts the signal in a manner complementary to the distortion produced by the following power amplifier.
Claim 2
Dependent Claim
177 words
A predistortion circuit for predistorting a signal applied to a following power amplifier exhibiting phase and amplitude nonlinearities as a function of input power, said circuit comprising in combination: an input terminal coupled to receive a signal to be amplified and an output terminal coupled to the input of said power amplifier; means for power dividing a signal applied to the circuit input terminal and for providing a 90° phase shift of one divided signal relative to the other; first and second active nonlinear means each adapted for receiving an input signal from a different one of the outputs of said power divider and each adapted for producing an output signal; and means coupled to receive the output signals from the nonlinear means for combining in phase the signals produced by the active nonlinear means; said active nonlinear means each adapted for receiving a bias voltage for controlling the amount of distortion produced by the predistortion circuit whereby the predistortion circuit predistorts the signal in a manner complementary to the distortion produced by the following power amplifier.
Claim 3
Dependent Claim
187 words
A predistortion circuit for predistorting a signal applied to a following power amplifier exhibiting phase and amplitude nonlinearities as a function of input power, said circuit comprising in combination: an input terminal coupled to receive a signal to be amplified and an output terminal coupled to the input of said power amplifier; means for power dividing a signal applied to the circuit input terminal and for providing a 90° phase shift of one divided signal relative to the other; first and second dual gate field effect transistors, each having a signal output terminal, a control gate and a signal gate, said signal gate coupled to a different one of the outputs of said power dividing means; and means coupled between the dual gate FET signal output terminals and circuit output terminal for combining in phase the signal produced by said dual gate FETs, each said control gate adapted for receiving a bias voltage for controlling the amount of phase and amplitude distortion produced by the predistortion circuit whereby the predistortion circuit predistorts the signal in a manner complementary to the distortion produced by the following power amplifier.
Claim 4
Dependent Claim
187 words
A predistortion circuit for predistorting a signal applied to a following power amplifier exhibiting phase and amplitude nonlinearities as a function of input power, said circuit comprising in combination: an input terminal coupled to receive a signal to be amplified and an output terminal coupled to the input of said power amplifier; means for power dividing a signal applied to the circuit input terminal and for providing a 90° phase shift of one divided signal relative to the other; first and second dual gate field effect transistors, each having a signal output terminal, a control gate and a signal gate, said signal gate coupled to a different one of the outputs of said power dividing means; and means coupled between the dual gate FET signal output terminals and circuit output terminal for combining in phase the signal produced by said dual gate FETs, each said control gate adapted for receiving a bias voltage for controlling the amount of phase and amplitude distortion produced by the predistortion circuit whereby the predistortion circuit predistorts the signal in a manner complementary to the distortion produced by the following power amplifier.
Claim 5
Dependent Claim
18 words
The combination as set forth in claim 2 wherein said means for power dividing is a 90° hybrid.
Claim 6
Dependent Claim
21 words
The combination as set forth in claim 2 further including means for applying a bias voltage to each said control gate.
Claim 7
Dependent Claim
26 words
The combination as set forth in claim 4 wherein said means for applying a bias voltage applies a different bias voltage to each said control gate.
Claim 8
Dependent Claim
21 words
The combination as set forth in claim 4 further including means for applying a bias voltage to each said signal gate.
Claim 9
Dependent Claim
26 words
The combination as set forth in claim 6 wherein said means for applying a bias voltage applies a different bias voltage to each said signal gate.
Claim 10
Dependent Claim
35 words
The combination as set forth in claim 2 further including means for applying a bias voltage to the control gate of at least one of said FETs which is a function of a changeable parameter.
Claim 11
Dependent Claim
34 words
The combination as set forth in claim 2 further including means for applying a bias voltage to the control gate of at least one of said FETs which is a function of input power.
Claim 12
Dependent Claim
46 words
The combination as set forth in claim 2 wherein each of said FETs includes source and drain terminals and wherein said predistortion circuit further comprises bias means coupled between said drain and source terminals, the voltage of said bias being a function of a changeable parameter.
Claim 13
Dependent Claim
49 words
The combination as set forth in claim 2 wherein each of said FETs includes source and drain terminals and wherein said predistortion circuit further comprises bias means coupled between said drain and source terminals, the voltage of said bias being a function of the temperature of said predistortion circuit.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-01-13 | 1989-07-15 | 1990-01-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-01-13 | 1993-07-15 | 1994-01-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-01-13 | 1997-07-15 | 1998-01-14 | $7700.00 | Window Closed / Lapsed |