US4564771A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Integrated Darlington transistor combination including auxiliary transistor and Zener diode
Assignee: Robert Bosch GmbH
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Filing: 1983-07-06
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Granted: 1986-01-14
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Expires: 2003-07-06
Abstract
Abstract In a three-stage Darlington transistor circuit, the base of the middle transistor is connected to the series combination of a resistance and a Zener diode, with the Zener diode anode being connected to the resistance. A voltage divider is provided between the collector and emitter of the power transistor. For reducing the loading and deviation from nominal value of the voltage divider with change of temperature, an auxiliary transistor (T 4 ) is provided having its base connected to one tap of the voltage divider and its emitter to the cathode of the Zener diode. The collector of the auxiliary transistor is provided in the integrated circuit substrate in common with the collectors of the transistors of the Darlington circuit. The other tap of the voltage divider is provided for emitter-collector clamping voltage purposes.
Inventors
- 👤 Peter Flohrs
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 18:54
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/641; H10D84/642; H03; H03K; H03K17/00; H03K17/08; H03K17/082; H03K17/0826; H03K17/14
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
398 words
Darlington transistor combination comprising an input transistor (T 1 ), a driver transistor (T 2 ) and a power transistor (T 3 ), the respective collectors of said input and driver transistor being connected to the collector of said power transistor, the emitter of said input transistor being connected to the base of said driver transistor and the emitter of said driver transistor being connected to the base of said power transistor, the base of said input transistor being the control electrode of said transistor combination for connection of an input signal, and the collector and emitter of said power transistor providing the controlled path connection of said transistor combination, the base of said driver transistor (T 2 ) being connected to a series circuit containing a first resistance (R 4 ) connected to said driver transistor base and a Zener diode (ZD) having its anode connected to said first resistance (R 4 ), a second resistance (R 2 ) being connected in parallel to the base-emitter path of said driver transistor, said transistors, Zener diode, and first and second resistances being constituted as portions of an integrated circuit monolithically integrated by planar integrated circuit technology on a common semiconductor substrate which provides the collector zones of said transistors, the cathode of said Zener diode (ZD) being in circuit with the tap (15h) of a voltage divider consisting of a third resistance (R 5 ,R 6 ) and a fourth resistance (R 7 ), said voltage divider having its ends respectively connected to the collector and emitter of said power transistor (T 3 ), said transistor combination incorporating the improvement which comprises: an auxiliary transistor (T 4 ) monolithically integrated on said common substrate and having its collector zone provided by said common substrate, coupled for conduction of the series circuit between said base of said driver transistor (T 2 ) and the cathode of said Zener diode (ZD) under control of the potential of said tap (15h) of said voltage divider and having its collector connected to the collector of said power transistor by virtue of its said collector, like the collectors of the others of said transistors (T 1 , T 2 , T 3 ), being provided by said common substrate, the base-emitter path of said auxiliary transistor (T 4 ) being connected for receiving current flowing between said tap and said Zener diode cathode.
Claim 2
Dependent Claim
398 words
Darlington transistor combination comprising an input transistor (T 1 ), a driver transistor (T 2 ) and a power transistor (T 3 ), the respective collectors of said input and driver transistor being connected to the collector of said power transistor, the emitter of said input transistor being connected to the base of said driver transistor and the emitter of said driver transistor being connected to the base of said power transistor, the base of said input transistor being the control electrode of said transistor combination for connection of an input signal, and the collector and emitter of said power transistor providing the controlled path connection of said transistor combination, the base of said driver transistor (T 2 ) being connected to a series circuit containing a first resistance (R 4 ) connected to said driver transistor base and a Zener diode (ZD) having its anode connected to said first resistance (R 4 ), a second resistance (R 2 ) being connected in parallel to the base-emitter path of said driver transistor, said transistors, Zener diode, and first and second resistances being constituted as portions of an integrated circuit monolithically integrated by planar integrated circuit technology on a common semiconductor substrate which provides the collector zones of said transistors, the cathode of said Zener diode (ZD) being in circuit with the tap (15h) of a voltage divider consisting of a third resistance (R 5 ,R 6 ) and a fourth resistance (R 7 ), said voltage divider having its ends respectively connected to the collector and emitter of said power transistor (T 3 ), said transistor combination incorporating the improvement which comprises: an auxiliary transistor (T 4 ) monolithically integrated on said common substrate and having its collector zone provided by said common substrate, coupled for conduction of the series circuit between said base of said driver transistor (T 2 ) and the cathode of said Zener diode (ZD) under control of the potential of said tap (15h) of said voltage divider and having its collector connected to the collector of said power transistor by virtue of its said collector, like the collectors of the others of said transistors (T 1 , T 2 , T 3 ), being provided by said common substrate, the base-emitter path of said auxiliary transistor (T 4 ) being connected for receiving current flowing between said tap and said Zener diode cathode.
Claim 3
Dependent Claim
46 words
Darlington transistor combination according to claim 1, in which said auxiliary transistor (T 4 ) has its base connected to said tap (15h) of said voltage divider (R 5 ,R 6 ,R 7 ) and its emitter connected to the cathode of said Zener diode (ZD).
Claim 4
Dependent Claim
45 words
Darlington transistor combination according to claim 2, in which in addition to said tap (15h) of said voltage divider, said voltage divider is provided with an additional tap (15f) electrically closer to said common collector connection for emitter-collector clamping by means of said Zener diode.
Claim 5
Dependent Claim
58 words
Darlington transistor combination according to claim 2, in which all of said resistances, including the resistances of said voltage divider, are monolithically integrated in the same integrated circuit unit as said transistors, and in which said resistances of said voltage divider are integrated monolithically in planar technology in said common substrate providing the collector zones of said transistors.
Claim 6
Dependent Claim
58 words
Darlington transistor combination according to claim 3, in which all of said resistances, including the resistances of said voltage divider, are monolithically integrated in the same integrated circuit unit as said transistors, and in which said resistances of said voltage divider are integrated monolithically in planar technology in said common substrate providing the collector zones of said transistors.
Claim 7
Dependent Claim
38 words
Darlington transistor combination according to claim 2, in which the resistances of said voltage divider are provided externally of said substrate providing the collector zones of said transistors and are constituted in at least one discrete circuit component.
Claim 8
Dependent Claim
38 words
Darlington transistor combination according to claim 3, in which the resistances of said voltage divider are provided externally of said substrate providing the collector zones of said transistors and are constituted in at least one discrete circuit component.
Claim 9
Dependent Claim
45 words
Darlington transistor combination according to claim 1, in which in addition to said tap (15h) of said voltage divider, said voltage divider is provided with an additional tap (15f) electrically closer to said common collector connection for emitter-collector clamping by means of said Zener diode.
Claim 10
Dependent Claim
58 words
Darlington transistor combination according to claim 1, in which all of said resistances, including the resistances of said voltage divider, are monolithically integrated in the same integrated circuit unit as said transistors, and in which said resistances of said voltage divider are integrated monolithically in planar technology in said common substrate providing the collector zones of said transistors.
Claim 11
Dependent Claim
58 words
Darlington transistor combination according to claim 8, in which all of said resistances, including the resistances of said voltage divider, are monolithically integrated in the same integrated circuit unit as said transistors, and in which said resistances of said voltage divider are integrated monolithically in planar technology in said common substrate providing the collector zones of said transistors.
Claim 12
Dependent Claim
38 words
Darlington transistor combination according to claim 1, in which the resistances of said voltage divider are provided externally of said substrate providing the collector zones of said transistors and are constituted in at least one discrete circuit component.
Claim 13
Dependent Claim
38 words
Darlington transistor combination according to claim 8, in which the resistances of said voltage divider are provided externally of said substrate providing the collector zones of said transistors and are constituted in at least one discrete circuit component.
References Cited (Backward Citations)
US3577167A
Cited
US3577062A
Cited
US3633052A
Cited
US3997802A
Cited
US4028561A
Cited
US4259939A
Cited
US4369380A
Cited
WO1982000045A1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-01-13 | 1989-07-15 | 1990-01-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-01-13 | 1993-07-15 | 1994-01-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-01-13 | 1997-07-15 | 1998-01-14 | $7700.00 | Window Closed / Lapsed |