Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
249 words
A noise reduction circuit comprising: lowpass filter means supplied with an input luminace signal having a noise component of an input video signal, said lowpass filter means having a characteristic which eliminates a high-frequency component including said noise component; delay means for delaying said input luminance signal by a predetermined time period τ so that an output signal of said delay means has a leading edge which occurs after said predetermined time period τ, said time period beginning at the start of a rise in an output signal of said lowpass filter means, said predetermined time period τ being equal to a rise time of the output signal of said lowpass filter means; first subtraction means comprising a first adder means which is directly supplied with the output signals of said delay means and is supplied with the output signal of said lowpass filter means via a first phase inverting means for subtracting the output signal of said lowpass filter means from the output signal of said delay means; limiter means for amplitude-limiting an output signal of said first subtraction means; and second subtraction means comprising a second adder means which is directly supplied with the output signal of said delay means and is supplied with the output signal of said limiter via a second phase inverting means for subtracting an output signal of said limiter means from the output signal of said delay means to produce a luminance signal from which said noise component has been substantially eliminated.
Claim 2
Dependent Claim
249 words
A noise reduction circuit comprising: lowpass filter means supplied with an input luminace signal having a noise component of an input video signal, said lowpass filter means having a characteristic which eliminates a high-frequency component including said noise component; delay means for delaying said input luminance signal by a predetermined time period τ so that an output signal of said delay means has a leading edge which occurs after said predetermined time period τ, said time period beginning at the start of a rise in an output signal of said lowpass filter means, said predetermined time period τ being equal to a rise time of the output signal of said lowpass filter means; first subtraction means comprising a first adder means which is directly supplied with the output signals of said delay means and is supplied with the output signal of said lowpass filter means via a first phase inverting means for subtracting the output signal of said lowpass filter means from the output signal of said delay means; limiter means for amplitude-limiting an output signal of said first subtraction means; and second subtraction means comprising a second adder means which is directly supplied with the output signal of said delay means and is supplied with the output signal of said limiter via a second phase inverting means for subtracting an output signal of said limiter means from the output signal of said delay means to produce a luminance signal from which said noise component has been substantially eliminated.
Claim 3
Dependent Claim
28 words
A noise reduction circuit as claimed in claim 1 in which said predetermined time period τ is a value in a range of 0.5 μsec to 2.0 μsec.
Claim 4
Dependent Claim
25 words
A noise reduction circuit as claimed in claim 2 in which said predetermined time period τ is a value in the order of 1.5 μsec.
Claim 5
Dependent Claim
78 words
A noise reduction circuit as claimed in claim 1 further comprising a highpass filter means for obtaining a high-frequency component of the output signal of said second subtraction means, means for amplitude-limiting an output signal of said highpass filter means, and means for subtracting this amplitude-limited output from the output signal of said second subtraction means to produce a luminance signal from which noise components included along a waveform of the input luminance signal have been completely eliminated.
Claim 6
Dependent Claim
210 words
A noise reduction circuit comprising: delay means supplied with an input luminance signal having a noise component of an input video signal for delaying the luminance signal by a predetermined time period (1H-τ), where 1H represents one horizontal scanning period of the video signal; lowpass filter means supplied with a delayed output luminance signal of said delay means for eliminating a high-frequency component including said noise component, said lowpass filter means producing an output signal having a predetermined rise time τ; first subtraction means comprising a first adder means which is directly supplied with the output signal of said delay means and is supplied with the output signal of said lowpass filter means via a first phase inverting means for subtracting the output signal of said lowpass filter means form said input luminance signal; limiter means for amplitude-limiting an output signal of said first subtraction means; and second subtraction means comprising a second adder means which is directly supplied with the output signal of said delay means and is supplied with the output signal of said limiter via a second phase inverting means for subtracting an output signal of said limiter means from said input luminance signal to produce a luminance signal from which said noise component is substantially eliminated.
Claim 7
Dependent Claim
210 words
A noise reduction circuit comprising: delay means supplied with an input luminance signal having a noise component of an input video signal for delaying the luminance signal by a predetermined time period (1H-τ), where 1H represents one horizontal scanning period of the video signal; lowpass filter means supplied with a delayed output luminance signal of said delay means for eliminating a high-frequency component including said noise component, said lowpass filter means producing an output signal having a predetermined rise time τ; first subtraction means comprising a first adder means which is directly supplied with the output signal of said delay means and is supplied with the output signal of said lowpass filter means via a first phase inverting means for subtracting the output signal of said lowpass filter means form said input luminance signal; limiter means for amplitude-limiting an output signal of said first subtraction means; and second subtraction means comprising a second adder means which is directly supplied with the output signal of said delay means and is supplied with the output signal of said limiter via a second phase inverting means for subtracting an output signal of said limiter means from said input luminance signal to produce a luminance signal from which said noise component is substantially eliminated.
Claim 8
Dependent Claim
74 words
A noise reduction circuit as claimed in claim 5 in which said first subtraction means comprises a first adder means directly supplied with said input luminance signal and supplied with the output signal of said lowpass filter via a phase inverting means, and said second subtraction means comprises a second adder means directly supplied with said input luminance signal and supplied with the output signal of said limiter means via another phase inverting means.
Claim 9
Dependent Claim
28 words
A noise reduction circuit as claimed in claim 5 in which said predetermined time period τ is a value in a range of 0.5 μsec to 2.0 μsec.
Claim 10
Dependent Claim
25 words
A noise reduction circuit as claimed in claim 7 in which said predetermined time period τ is a value in the order of 1.5 μsec.
Claim 11
Dependent Claim
197 words
A noise reduction circuit comprising: lowpass filter means supplied with an input luminance signal having a noise component for eliminating a high-frequency component including said noise component, said lowpass filter means producing an output signal having a predetermined rise time τ; delay means for delaying the output signal of said lowpass filter means by a predetermined time (1H-τ), where 1H represents one horizontal scanning period of the video signal; first subtraction means comprising a first adder means which is directly supplied with the output signal of said delay means and is supplied with the output signal of said lowpass filter means via a first phase inverting means for subtracting an output signal of said delay means from said input luminance signal; limiter means for amplitude-limiting an output signal of said first subtraction means; and second subtraction means comprising a second adder means which is directly supplied with the output signal of said delay means and is supplied with the output signal of said limiter via a second phase inverting means for subtracting an output signal of said limiter means from said input luminance signal to produce a luminance signal from which said noise component is substantially eliminated.
Claim 12
Dependent Claim
197 words
A noise reduction circuit comprising: lowpass filter means supplied with an input luminance signal having a noise component for eliminating a high-frequency component including said noise component, said lowpass filter means producing an output signal having a predetermined rise time τ; delay means for delaying the output signal of said lowpass filter means by a predetermined time (1H-τ), where 1H represents one horizontal scanning period of the video signal; first subtraction means comprising a first adder means which is directly supplied with the output signal of said delay means and is supplied with the output signal of said lowpass filter means via a first phase inverting means for subtracting an output signal of said delay means from said input luminance signal; limiter means for amplitude-limiting an output signal of said first subtraction means; and second subtraction means comprising a second adder means which is directly supplied with the output signal of said delay means and is supplied with the output signal of said limiter via a second phase inverting means for subtracting an output signal of said limiter means from said input luminance signal to produce a luminance signal from which said noise component is substantially eliminated.