High speed multiplying digital to analog converter

Claim 1

A high speed multiplier circuit for adjustment of its differential output voltage independent of the selection of the D.C. voltage offset of the output signals, said circuit comprising: a first pair of control devices each having an output terminal, a control terminal, and a common terminal, said common terminals being connected together; a second pair of control devices each having an output terminal, a control terminal, and a common terminal, said common terminals being connected together; output means cross-coupling the output terminals of the first and second pairs of control devices for providing differential output signals; means for cross-coupling the control terminals of the first and second pairs of control devices; means for differentially applying currents to the connected common terminals of the first and second pairs of control devices to independently produce a selected D.C. offset voltage in the differential output signal; a pair of input devices each having an output terminal, an input terminal, and a current receiving terminal, said input terminals being disposed to receive an input signal differentially therebetween, and said current receiving terminals being disposed to receive substantially equivalent currents; a current coupling device interconnected between the current receiving terminal of each of the input devices; a pair of diode means each being coupled to a different one of the cross-coupled control terminals of the first and second pairs of control devices and to a different one of the output terminals of the pair of input devices for differentially applying signal representative of the differential input signal to the cross-coupled control terminals of the first and second pairs of control devices.