US4560962A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multilayered printed circuit board with controlled 100 ohm impedance
Assignee: Unisys Corp
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Filing: 1983-08-30
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Granted: 1985-12-24
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Expires: 2003-08-30
Abstract
Abstract A printed circuit board of six planar layers has the layers separated by a dielectric of epoxy glass. The two central layer planes form a ground plane and a voltage plane. The two external planes and the internal planes involve series of microstrip signal lines of specially calculated widths and dielectric separations to provide an essentially 100 ohm characteristic impedance for the signal lines in reference to the ground and voltage planes.
Inventors
- 👤 Michael Barrow
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 10:47
CPC Classifications
H; H01; H01P; H01P3/00; H01P3/02; H01P3/08; H01P3/081; H01P3/088; H05; H05K; H05K1/00; H05K1/02; H05K1/0213; H05K1/0237; H05K1/024; H05K1/025; H05K3/00; H05K3/46; H05K1/0286; H05K1/0287; H05K1/0289; H05K1/0296; H05K1/0298; H05K2201/00; H05K2201/01; H05K2201/0183; H05K2201/0191; H05K2201/09; H05K2201/09209; H05K2201/0929; H05K2201/09309; H05K2201/09327; H05K2201/095; H05K2201/09609; H05K3/40; H05K3/42; H05K3/429
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
347 words
In a printed circuit board of less than 69 mils overall thickness having six planes of conductive layers wherein each layer is separated by an epoxy glass substrate with a dielectric constant of 4.2-5.0, the combination comprising: (a) a central dielectric epoxy glass substrate of 5 mils thickness which is overlaid by an upper central and a lower central conductive copper plane; (b) said upper central and said lower central conductive copper planes having a thickness of 1.4 mils and being respectively contiguous to a first internal upper epoxy glass dielectric substrate and a first internal lower epoxy glass dielectric substrate; (c) said first internal upper epoxy glass substrate and said first internal lower epoxy glass substrate each having a thickness of 25 mils; (d) an upper and a lower internal plane of microstrip transmission lines contiguous to said first internal upper and said first internal lower epoxy glass substrates, said upper and lower internal microstrip transmission lines, each line having a width/thickness ratio of 5 mils/0.7 mil and wherein said upper internal microstrip transmission lines run at right angles to said lower internal microstrip transmission lines; (e) a second internal upper and a second internal lower epoxy glass substrate having a 3 mil thickness and resting contiguous to said respective upper and lower internal plane of microstrip transmission lines; (f) an upper outer plane of microstrip transmission lines and a lower outer plane of microstrip transmission lines, each line having a width/thickness ratio of 8 mils/1.4 mils, and wherein said upper outer plane and lower outer plane of microstrip transmission lines reside respectively contiguous to said second internal upper and lower epoxy glass substrates, and said upper outer plane of transmission lines run at right angles to said lower outer plane of transmission lines; (g) a plurality of conductive land areas having central apertures for connection of component leads, said conductive land areas having connection to selected transmission lines and/or said central conductive copper planes; (h) and wherein the characteristic impedance between any microstrip transmission line and said central conductive copper planes is 100 ohms ±10%.
Claim 2
Dependent Claim
347 words
In a printed circuit board of less than 69 mils overall thickness having six planes of conductive layers wherein each layer is separated by an epoxy glass substrate with a dielectric constant of 4.2-5.0, the combination comprising: (a) a central dielectric epoxy glass substrate of 5 mils thickness which is overlaid by an upper central and a lower central conductive copper plane; (b) said upper central and said lower central conductive copper planes having a thickness of 1.4 mils and being respectively contiguous to a first internal upper epoxy glass dielectric substrate and a first internal lower epoxy glass dielectric substrate; (c) said first internal upper epoxy glass substrate and said first internal lower epoxy glass substrate each having a thickness of 25 mils; (d) an upper and a lower internal plane of microstrip transmission lines contiguous to said first internal upper and said first internal lower epoxy glass substrates, said upper and lower internal microstrip transmission lines, each line having a width/thickness ratio of 5 mils/0.7 mil and wherein said upper internal microstrip transmission lines run at right angles to said lower internal microstrip transmission lines; (e) a second internal upper and a second internal lower epoxy glass substrate having a 3 mil thickness and resting contiguous to said respective upper and lower internal plane of microstrip transmission lines; (f) an upper outer plane of microstrip transmission lines and a lower outer plane of microstrip transmission lines, each line having a width/thickness ratio of 8 mils/1.4 mils, and wherein said upper outer plane and lower outer plane of microstrip transmission lines reside respectively contiguous to said second internal upper and lower epoxy glass substrates, and said upper outer plane of transmission lines run at right angles to said lower outer plane of transmission lines; (g) a plurality of conductive land areas having central apertures for connection of component leads, said conductive land areas having connection to selected transmission lines and/or said central conductive copper planes; (h) and wherein the characteristic impedance between any microstrip transmission line and said central conductive copper planes is 100 ohms ±10%.
Claim 3
Dependent Claim
56 words
The combination of claim 1 which includes: (i) a plurality of interconnecting conductive paths transverse to said upper and lower internal and outer planes of microstrip transmission lines, said interconnecting conductive paths providing connection between selected ones of said land areas, of said microstrip transmission lines, and of said upper central and lower central conductive planes.
References Cited (Backward Citations)
US4047132A
Cited
US4434321A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-12-23 | 1989-06-24 | 1989-12-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-12-23 | 1993-06-24 | 1993-12-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-12-23 | 1997-06-24 | 1997-12-24 | $7700.00 | Window Closed / Lapsed |