Padless plated vias having soldered wicks for multi-layer printed circuit boards

Claim 1

Multi-layer printed circuit board having a plurality of conductive traces, the conductive traces being located on a plurality of circuit layers interspaced with a plurality of insulative layers, and having a plurality of through holes which have outer boundaries and extend substantially vertically through the board to communicate with one or more of said conductive traces and with an exterior surface of the board, the through holes having an outer border which has a perimeter at said exterior surface, said through holes being plated with a conductive material of a thickness to form vias, the vias having an inner boundary forming a hole and an outer boundary, characterized by: said outer boundary of the vias terminating before the via hole's outer border plus twice said thickness of said conductive material and; said termination being interrupted by a tab which extends partially around the via hole's outer border and extends beyond said border by more than three times the thickness of said conductive material said tab providing sufficient surface area on said exterior surface of the board to attract solder and thereby causing the solder to wick from the tab to the via by breaking the solder's surface tension, whereby osmotic pressure in the via causes the solder to coat the inner boundary.